公开(公告)号：US20050274978A1

公开(公告)日：2005-12-15

申请号：US11138951

申请日：2005-05-26

申请人： Dimitri Antoniadis ,  Judy Hoyt ,  Jongwan Jung ,  Shaofeng Yu

发明人： Dimitri Antoniadis ,  Judy Hoyt ,  Jongwan Jung ,  Shaofeng Yu

IPC分类号： H01L21/8238 ,  H01L29/10 ,  H01L29/49 ,  H01L29/78 ,  H01L31/0328

CPC分类号： H01L21/823807 ,  H01L21/823828 ,  H01L29/1054 ,  H01L29/4966 ,  H01L29/78

摘要： Strained Si/strained SiGe dual-channel layer substrate provides mobility advantage and when used as a CMOS substrate enables single workfunction metal-gate electrode technology. A single metal electrode with workfunction of 4.5 eV produces near ideal CMOS performance on a dual-channel layer substrate that consists sequentially of a silicon wafer, an epitaxially grown 30% Ge relaxed SiGe layer, a compressively strained 60% Ge layer, and a tensile-strained Si cap layer.

摘要翻译： 应变Si /应变SiGe双沟道层衬底提供了移动优势，并且当用作CMOS衬底时，可实现单功能金属栅电极技术。 具有4.5eV功函数的单个金属电极在双通道层衬底上产生接近理想的CMOS性能，其依次由硅晶片，外延生长的30％Ge弛豫SiGe层，压缩应变的60％Ge层和拉伸 有限硅层。

公开(公告)号：US20050009288A1

公开(公告)日：2005-01-13

申请号：US10802186

申请日：2004-03-17

申请人： Zhi-Yuan Cheng ,  Eugene Fitzgerald ,  Dimitri Antoniadis ,  Judy Hoyt

发明人： Zhi-Yuan Cheng ,  Eugene Fitzgerald ,  Dimitri Antoniadis ,  Judy Hoyt

IPC分类号： H01L21/205 ,  H01L21/02 ,  H01L21/20 ,  H01L21/762 ,  H01L27/12 ,  H01L21/00 ,  C30B1/00 ,  H01L21/46 ,  H01L21/84

CPC分类号： H01L21/76254 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/02546 ,  Y10S438/933

摘要： A process for producing monocrystalline semiconductor layers. In an exemplary embodiment, a graded Si1-xGex (x increases from 0 to y) is deposited on a first silicon substrate, followed by deposition of a relaxed Si1-yGey layer, a thin strained Si1-zGez layer and another relaxed Si1-yGey layer. Hydrogen ions are then introduced into the strained SizGez layer. The relaxed Si1-yGey layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the strained Si layer, such that the second relaxed Si1-yGey layer remains on the second substrate. In another exemplary embodiment, a graded SixGex is deposited on a first silicon substrate, where the Ge concentration x is increased from 0 to 1. Then a relaxed GaAs layer is deposited on the relaxed Ge buffer. As the lattice constant of GaAs is close to that of Ge, GaAs has high quality with limited dislocation defects. Hydrogen ions are introduced into the relaxed GaAs layer at the selected depth. The relaxed GaAs layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the hydrogen ion rich layer, such that the upper portion of relaxed GaAs layer remains on the second substrate.

摘要翻译： 一种制造单晶半导体层的方法。 在示例性实施例中，分级的Si1-xGex（x从0增加到y）沉积在第一硅衬底上，随后沉积弛豫的Si1-yGey层，薄的应变Si1-zGez层和另一个弛豫的Si1-yGey 层。 然后将氢离子引入应变SizGez层。 松弛的Si1-yGey层与第二氧化基底结合。 退火处理在接合的Si层处分离结合对，使得第二弛豫Si1-yGey层保留在第二基板上。 在另一个示例性实施例中，分级的SixGex沉积在第一硅衬底上，其中Ge浓度x从0增加到1.然后在弛豫的Ge缓冲器上沉积弛豫的GaAs层。 由于GaAs的晶格常数接近于Ge，所以GaAs具有高质量和有限的位错缺陷。 在所选择的深度处将氢离子引入到松弛的GaAs层中。 松弛的GaAs层结合到第二氧化衬底上。 退火处理在氢离子富集层处分离结合对，使得松弛的GaAs层的上部保留在第二基板上。