公开(公告)号：US20240282820A1

公开(公告)日：2024-08-22

申请号：US18638134

申请日：2024-04-17

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Yi PENG ,  Ting TSAI ,  Chung-Wei HUNG ,  Jung-Ting CHEN ,  Ying-Hua LAI ,  Song-Bor LEE ,  Bor-Zen TIEN

IPC分类号： H01L29/08 ,  H01L21/02 ,  H01L21/265 ,  H01L29/24 ,  H01L29/78

CPC分类号： H01L29/0847 ,  H01L29/24 ,  H01L21/02521 ,  H01L21/02529 ,  H01L21/0262 ,  H01L21/26513 ,  H01L29/7848 ,  H01L29/785

摘要： A semiconductor device, includes a channel region, and a source/drain region adjacent to the channel region. The source/drain region includes a first epitaxial layer, a second epitaxial layer epitaxially formed on the first epitaxial layer and a third epitaxial layer epitaxially formed on the second epitaxial layer, and the first epitaxial layer is made of SiAs.

公开(公告)号：US20240088294A1

公开(公告)日：2024-03-14

申请号：US18515908

申请日：2023-11-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shahaji B. MORE ,  Chun Hsiung TSAI

IPC分类号： H01L29/78 ,  H01L21/02 ,  H01L29/06 ,  H01L29/24 ,  H01L29/267 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

CPC分类号： H01L29/7848 ,  H01L21/02521 ,  H01L21/02603 ,  H01L29/0673 ,  H01L29/24 ,  H01L29/267 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66636 ,  H01L29/66742 ,  H01L29/78618 ,  H01L29/78696

摘要： In a method of manufacturing a semiconductor device, an upper fin structure in which first semiconductor layers and second semiconductor layers are alternately stacked is formed over a lower fin structure, a sacrificial gate structure is formed over the upper fin structure, a source/drain region of the upper fin structure, which is not covered by the sacrificial gate structure, is etched thereby forming a source/drain space, the first semiconductor layers are laterally etched through the source/drain space, an inner spacer made of a dielectric material is formed on an end of each of the etched first semiconductor layers, and a source/drain epitaxial layer is formed in the source/drain space to cover the inner spacer. In etching the source/drain region, a part of the lower fin structure is also etched to form a recess, in which a (111) surface is exposed.

公开(公告)号：US11901453B2

公开(公告)日：2024-02-13

申请号：US17587402

申请日：2022-01-28

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Sung Uk Jang ,  Ki Hwan Kim ,  Su Jin Jung ,  Bong Soo Kim ,  Young Dae Cho

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L29/08 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L29/24

CPC分类号： H01L29/7848 ,  H01L21/02521 ,  H01L21/02603 ,  H01L21/02636 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/24 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66742 ,  H01L29/66795 ,  H01L29/7851 ,  H01L29/78618 ,  H01L29/78696

摘要： A semiconductor device including an active region extending in a first direction on a substrate; a gate structure intersecting the active region and extending in a second direction on the substrate; and a source/drain region on the active region and at least one side of the gate structure, wherein the source/drain region includes a plurality of first epitaxial layers spaced apart from each other in the first direction, the plurality of first epitaxial layers including first impurities of a first conductivity type; and a second epitaxial layer filling a space between the plurality of first epitaxial layers, the second epitaxial layer including second impurities of the first conductivity type.

公开(公告)号：US20230411322A1

公开(公告)日：2023-12-21

申请号：US18176189

申请日：2023-02-28

申请人： Kioxia Corporation

发明人： Hiroaki ASHIDATE ,  Tomoyuki TAKEISHI

IPC分类号： H01L23/00 ,  H01L21/768 ,  H01L21/603 ,  H01L21/302 ,  H01L21/02 ,  H01L29/68

CPC分类号： H01L24/06 ,  H01L21/76865 ,  H01L21/603 ,  H01L21/302 ,  H01L21/02521 ,  H01L21/02123 ,  H01L29/685

摘要： A method for manufacturing a semiconductor device, a first structure is formed on a first substrate. A first bonded body is formed by bonding a supporting substrate lower in rigidity than the first substrate to a first principal surface, on which the first structure is formed, of the first substrate. The first substrate is removed from the first bonded body. A second structure is formed on a second substrate. A third structure is formed on a third substrate. A second bonded body is formed by bonding a second principal surface, on which the second structure is formed, of the second substrate to a third principal surface, on which the third structure is formed, of the third substrate. The second substrate is removed from the second bonded body. A third bonded body is formed by bonding a fourth principal surface, which is exposed after the first substrate is removed, of the first bonded body to a fifth principal surface, which is exposed after the second substrate is removed, of the second bonded body. The supporting substrate is removed from the third bonded body.

公开(公告)号：US11848206B2

公开(公告)日：2023-12-19

申请号：US17893802

申请日：2022-08-23

申请人： Paragraf Ltd.

发明人： Simon Charles Stewart Thomas

IPC分类号： C30B25/16 ,  H01L21/02 ,  C30B25/10 ,  C30B29/02 ,  C30B29/06 ,  C30B29/60 ,  C23C16/26 ,  C23C16/24 ,  C01B32/186 ,  C23C16/455 ,  C30B25/14 ,  C30B29/40

CPC分类号： H01L21/0262 ,  C01B32/186 ,  C23C16/24 ,  C23C16/26 ,  C23C16/45572 ,  C30B25/10 ,  C30B25/14 ,  C30B25/16 ,  C30B29/02 ,  C30B29/06 ,  C30B29/403 ,  C30B29/406 ,  C30B29/60 ,  H01L21/0254 ,  H01L21/0257 ,  H01L21/02521 ,  H01L21/02527 ,  H01L21/02532 ,  H01L21/0242 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02389 ,  H01L21/02392 ,  H01L21/02395 ,  H01L21/02398 ,  H01L21/02403 ,  H01L21/02422

摘要： A method of producing graphene or other two-dimensional material such as graphene including heating the substrate held within a reaction chamber to a temperature that is within a decomposition range of a precursor, and that allows two-dimensional crystalline material formation from a species released from the decomposed precursor; establishing a steep temperature gradient (preferably >1000° C. per meter) that extends away from the substrate surface towards an inlet for the precursor; and introducing precursor through the relatively cool inlet and across the temperature gradient towards the substrate surface. The steep temperature gradient ensures that the precursor remains substantially cool until it is proximate the substrate surface thus minimizing decomposition or other reaction of the precursor before it is proximate the substrate surface. The separation between the precursor inlet and the substrate is less than 100 mm.

公开(公告)号：US11695053B2

公开(公告)日：2023-07-04

申请号：US17948961

申请日：2022-09-20

申请人： STMICROELECTRONICS, INC.

发明人： John H. Zhang

IPC分类号： H01L29/51 ,  H01L21/02 ,  H01L21/28 ,  H01L29/45 ,  H01L29/49 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/285 ,  H01L21/768 ,  C23C14/04 ,  C23C14/22 ,  H01L29/66

CPC分类号： H01L29/51 ,  C23C14/048 ,  C23C14/221 ,  H01L21/02521 ,  H01L21/02631 ,  H01L21/285 ,  H01L21/2855 ,  H01L21/28088 ,  H01L21/76831 ,  H01L21/823418 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823828 ,  H01L29/456 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545

摘要： Energy bands of a thin film containing molecular clusters are tuned by controlling the size and the charge of the clusters during thin film deposition. Using atomic layer deposition, an ionic cluster film is formed in the gate region of a nanometer-scale transistor to adjust the threshold voltage, and a neutral cluster film is formed in the source and drain regions to adjust contact resistance. A work function semiconductor material such as a silver bromide or a lanthanum oxide is deposited so as to include clusters of different sizes such as dimers, trimers, and tetramers, formed from isolated monomers. A type of Atomic Layer Deposition system is used to deposit on semiconductor wafers molecular clusters to form thin film junctions having selected energy gaps. A beam of ions contains different ionic clusters which are then selected for deposition by passing the beam through a filter in which different apertures select clusters based on size and orientation.

公开(公告)号：US20180308691A1

公开(公告)日：2018-10-25

申请号：US16020090

申请日：2018-06-27

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Kangguo Cheng ,  Keith E. Fogel ,  Jeehwan Kim ,  Devendra K. Sadana

IPC分类号： H01L21/02 ,  H01L29/267 ,  H01L29/04 ,  H01L21/324

CPC分类号： H01L21/02428 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02494 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/02647 ,  H01L21/02658 ,  H01L21/02694 ,  H01L21/3247 ,  H01L29/04 ,  H01L29/045 ,  H01L29/267

摘要： A method for forming a heteroepitaxial layer includes forming an epitaxial grown layer on a monocrystalline substrate and patterning the epitaxial grown layer to form fins. The fins are converted to porous fins. A surface of the porous fins is treated to make the surface suitable for epitaxial growth. Lattice mismatch is compensated for between an epitaxially grown monocrystalline layer grown on the surface and the monocrystalline substrate by relaxing the epitaxially grown monocrystalline layer using the porous fins to form a relaxed heteroepitaxial interface with the monocrystalline substrate.

公开(公告)号：US10084066B2

公开(公告)日：2018-09-25

申请号：US15429335

申请日：2017-02-10

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Yu-Ming Lin ,  Ken-Ichi Goto

IPC分类号： H01L21/84 ,  H01L29/66 ,  H01L21/768 ,  H01L21/02 ,  H01L29/78 ,  H01L23/535 ,  H01L29/10 ,  H01L29/24 ,  H01L29/16

CPC分类号： H01L29/66795 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02266 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/02381 ,  H01L21/02422 ,  H01L21/02521 ,  H01L21/02527 ,  H01L21/02568 ,  H01L21/0262 ,  H01L21/76805 ,  H01L21/76895 ,  H01L21/76897 ,  H01L23/535 ,  H01L29/1037 ,  H01L29/1606 ,  H01L29/24 ,  H01L29/41791 ,  H01L29/66545 ,  H01L29/785

摘要： A semiconductor device including a Fin FET device includes a fin structure protruding from a substrate layer and having a length extending in a first direction. A channel layer is formed on the fin structure. A gate stack including a gate electrode layer and a gate dielectric layer extending in a second direction perpendicular to the first direction is formed over the channel layer covering a portion of the length of the fin structure. The source and drain contacts are formed over trenches that extend into a portion of a height of the fin structure.

公开(公告)号：US20180254292A1

公开(公告)日：2018-09-06

申请号：US15969250

申请日：2018-05-02

申请人： BOE TECHNOLOGY GROUP CO., LTD.

发明人： Tuo SUN

IPC分类号： H01L27/12 ,  H01L29/786 ,  H01L21/027 ,  H01L29/26 ,  H01L29/66 ,  H01L21/02

CPC分类号： H01L27/127 ,  H01L21/02521 ,  H01L21/02527 ,  H01L21/02601 ,  H01L21/02603 ,  H01L21/02628 ,  H01L21/0273 ,  H01L27/1222 ,  H01L29/26 ,  H01L29/66742 ,  H01L29/786 ,  H01L29/78603 ,  H01L29/78681 ,  H01L29/78684 ,  H01L29/7869 ,  H01L29/78696

摘要： A thin film transistor and a method for manufacturing the same, an array substrate including the thin film transistor, and an electronic apparatus including the thin film transistor or provided with the array substrate. The thin film transistor includes: a gate electrode, a gate insulating layer, an active layer, and a source electrode and a drain electrode, the active layer is formed of a mixture including a semiconductor nano-material and a photoresist material. The method for manufacturing the thin film transistor includes: preparing a mixture including a semiconductor nano-material and a photoresist material; applying the mixture over a substrate, and forming a patterned active layer by exposure and development.

公开(公告)号：US10056523B2

公开(公告)日：2018-08-21

申请号：US15350068

申请日：2016-11-13

申请人： SAMSUNG RESEARCH AMERICA, INC.

发明人： Peter T. Kazlas ,  John Spencer Morris ,  Robert J. Nick ,  Zoran Popovic ,  Matthew Stevenson ,  Jonathan S. Steckel

IPC分类号： H01L33/06 ,  H01L33/00 ,  H01L21/02 ,  B82Y40/00 ,  B82Y20/00

CPC分类号： H01L33/06 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y40/00 ,  C09K11/02 ,  C09K11/565 ,  C09K11/883 ,  H01L21/0237 ,  H01L21/02521 ,  H01L21/02557 ,  H01L21/0256 ,  H01L21/02601 ,  H01L21/02664 ,  H01L29/127 ,  H01L33/005 ,  H01L33/40

摘要： A method of making a device comprises forming a layer comprising quantum dots over a substrate including a first electrode, fixing the layer comprising quantum dots formed over the substrate, and exposing at least a portion of, and preferably all, exposed surfaces of the fixed layer comprising quantum dots to small molecules. The layer comprising quantum dots can be preferably fixed in the absence or substantial absence of oxygen. Also disclosed is a method of making a device comprises forming a layer comprising quantum dots over a substrate including a first electrode, exposing the layer comprising quantum dots to small molecules and light flux. Also disclosed is a method of making a film including a layer comprising quantum dots, the method comprising forming a layer comprising quantum dots over a carrier substrate, fixing the layer comprising quantum dots formed over the carrier substrate, and exposing at least a portion of, and preferably all, exposed surfaces of the fixed layer comprising quantum dots to small molecules. The layer comprising quantum dots can be preferably fixed in the absence or substantial absence of oxygen. Also disclosed is a method of preparing a device component including a layer comprising quantum dots, the method comprising forming a layer comprising quantum dots over a layer comprising a charge transport material, exposing the layer comprising quantum dots to small molecules and light flux. Devices, device components, and films are also disclosed.