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公开(公告)号：US07639053B2
公开(公告)日：2009-12-29
申请号：US12134307
申请日：2008-06-06
申请人： Ding-Shiuan Shen , Shao-Ku Kao , Shen-Iuan Liu , Chia-Liang Lai
发明人： Ding-Shiuan Shen , Shao-Ku Kao , Shen-Iuan Liu , Chia-Liang Lai
IPC分类号： H03L7/06
CPC分类号： H03L7/1976 , H03L7/0996 , H03L7/193
摘要： A spread spectrum clock generator includes: a phase frequency detector, for generating a phase difference signal according to a frequency divided signal and a reference signal with a reference frequency; a charge pump, for receiving the phase difference signal and generating an output current according to the phase difference signal; a loop filter, for receiving the output current and converting the output current to a voltage-controlled signal; a voltage-controlled oscillator, for receiving the voltage-controlled signal and generating a plurality of voltage-controlled output signals, wherein the plurality of voltage-controlled signals have a specific phase difference and a same voltage-controlled frequency; a frequency dividing unit, for receiving the plurality of voltage-controlled output signal and generating the frequency divided signal; and a delta-sigma modulator, for controlling the frequency dividing unit to have an equivalent divided value of (N+b)S+(N−a)(P−S) through receiving the frequency divided signal and a control word; wherein N, P, and S are integers, and a, b are fractional numbers, and S can be adjusted by the delta-sigma modulator.
摘要翻译： 扩频时钟发生器包括：相位频率检测器，用于根据分频信号和参考频率产生参考信号产生相位差信号; 电荷泵，用于接收相位差信号并根据相位差信号产生输出电流; 环路滤波器，用于接收输出电流并将输出电流转换成电压控制信号; 压控振荡器，用于接收所述压控信号并产生多个压控输出信号，其中所述多个压控信号具有特定相位差和相同的压控频率; 分频单元，用于接收多个压控输出信号并产生分频信号; 和Δ-Σ调制器，用于通过接收分频信号和控制字来控制分频单元具有（N + b）S +（N-a）（P-S）的等效分频值; 其中N，P和S是整数，a，b是分数，S可以由delta-Σ调制器调节。
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公开(公告)号：US20080303566A1
公开(公告)日：2008-12-11
申请号：US12134307
申请日：2008-06-06
申请人： Ding-Shiuan Shen , Shao-Ku Kao , Shen-Iuan Liu , Chia-Liang Lai
发明人： Ding-Shiuan Shen , Shao-Ku Kao , Shen-Iuan Liu , Chia-Liang Lai
IPC分类号： H03L7/06
CPC分类号： H03L7/1976 , H03L7/0996 , H03L7/193
摘要： A spread spectrum clock generator includes: a phase frequency detector, for generating a phase difference signal according to a frequency divided signal and a reference signal with a reference frequency; a charge pump, for receiving the phase difference signal and generating an output current according to the phase difference signal; a loop filter, for receiving the output current and converting the output current to a voltage-controlled signal; a voltage-controlled oscillator, for receiving the voltage-controlled signal and generating a plurality of voltage-controlled output signals, wherein the plurality of voltage-controlled signals have a specific phase difference and a same voltage-controlled frequency; a frequency dividing unit, for receiving the plurality of voltage-controlled output signal and generating the frequency divided signal; and a delta-sigma modulator, for controlling the frequency dividing unit to have an equivalent divided value of (N+b)S+(N−a)(P−S) through receiving the frequency divided signal and a control word; wherein N, P, and S are integers, and a, b are fractional numbers, and S can be adjusted by the delta-sigma modulator.
摘要翻译： 扩频时钟发生器包括：相位频率检测器，用于根据分频信号和参考频率产生参考信号产生相位差信号; 电荷泵，用于接收相位差信号并根据相位差信号产生输出电流; 环路滤波器，用于接收输出电流并将输出电流转换成电压控制信号; 压控振荡器，用于接收所述压控信号并产生多个压控输出信号，其中所述多个压控信号具有特定相位差和相同的压控频率; 分频单元，用于接收多个压控输出信号并产生分频信号; 和Δ-Σ调制器，用于通过接收分频信号和控制字来控制分频单元具有（N + b）S +（N-a）（P-S）的等效分频值; 其中N，P和S是整数，a，b是分数，S可以由delta-Σ调制器调节。
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公开(公告)号：US20100208857A1
公开(公告)日：2010-08-19
申请号：US12372741
申请日：2009-02-18
IPC分类号： H03D3/24
CPC分类号： H03L7/0893 , H03L7/087 , H03L7/093 , H03L7/183 , H03L7/1976 , H03L2207/06
摘要： A phase-locked loop circuit, including: an operating circuit for detecting a difference between a reference signal and a feedback oscillating signal to generate a detected result, and generating a first control signal according to the detected result, an auxiliary circuit for generating a second control signal that is asynchronous with the first control signal, and a controllable oscillator coupled to the operating circuit and the auxiliary circuit for generating an output oscillating signal according to the first control signal and the second control signal, wherein the feedback oscillating signal is derived from the output oscillating signal.
摘要翻译： 一种锁相环电路，包括：用于检测参考信号和反馈振荡信号之间的差以产生检测结果的操作电路，以及根据检测结果生成第一控制信号;辅助电路，用于产生第二 与第一控制信号异步的控制信号，以及耦合到操作电路和辅助电路的可控振荡器，用于根据第一控制信号和第二控制信号产生输出振荡信号，其中反馈振荡信号从 输出振荡信号。
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公开(公告)号：US08259890B2
公开(公告)日：2012-09-04
申请号：US12372741
申请日：2009-02-18
IPC分类号： H03D3/24
CPC分类号： H03L7/0893 , H03L7/087 , H03L7/093 , H03L7/183 , H03L7/1976 , H03L2207/06
摘要： A phase-locked loop circuit, including: an operating circuit for detecting a difference between a reference signal and a feedback oscillating signal to generate a detected result, and generating a first control signal according to the detected result, an auxiliary circuit for generating a second control signal that is asynchronous with the first control signal, and a controllable oscillator coupled to the operating circuit and the auxiliary circuit for generating an output oscillating signal according to the first control signal and the second control signal, wherein the feedback oscillating signal is derived from the output oscillating signal.
摘要翻译： 一种锁相环电路，包括：用于检测参考信号和反馈振荡信号之间的差以产生检测结果的操作电路，以及根据检测结果生成第一控制信号;辅助电路，用于产生第二 与第一控制信号异步的控制信号，以及耦合到操作电路和辅助电路的可控振荡器，用于根据第一控制信号和第二控制信号产生输出振荡信号，其中反馈振荡信号从 输出振荡信号。
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公开(公告)号：US09336170B2
公开(公告)日：2016-05-10
申请号：US13031616
申请日：2011-02-22
申请人： Hao-Ping Hong , Shang-Ping Chen , Ding-Shiuan Shen
发明人： Hao-Ping Hong , Shang-Ping Chen , Ding-Shiuan Shen
CPC分类号： H02J7/0052 , G06F1/266 , G06F13/385 , G06F13/4072 , G06F2213/0042 , H02J7/0045 , H02J7/0068 , H02J7/0081 , H02J2007/0062
摘要： A universal serial bus device includes: a core circuit having a first pin and a second pin, and having an input impedance looking into the core circuit from the first pin and the second pin; and a charging control circuit, coupled to the core circuit, arranged for providing a voltage source having a predetermined voltage to one of the first pin and the second pin and for providing a current source having a predetermined current to the other of the first pin and the second pin; wherein the input impedance of the core circuit is configured to make the predetermined voltage and the predetermined current substantially intact when an external charger charges a battery device of the universal serial bus device.
摘要翻译： 通用串行总线装置包括：具有第一引脚和第二引脚的核心电路，并具有从第一引脚和第二引脚看入核心电路的输入阻抗; 以及连接到所述核心电路的充电控制电路，被布置成向所述第一引脚和所述第二引脚之一提供具有预定电压的电压源，并且用于向所述第一引脚中的另一个提供具有预定电流的电流源，以及 第二针 其中，所述核心电路的输入阻抗被配置为当外部充电器对所述通用串行总线设备的电池装置充电时，使所述预定电压和所述预定电流基本上完整。
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公开(公告)号：US20110279095A1
公开(公告)日：2011-11-17
申请号：US13031616
申请日：2011-02-22
申请人： Hao-Ping Hong , Shang-Ping Chen , Ding-Shiuan Shen
发明人： Hao-Ping Hong , Shang-Ping Chen , Ding-Shiuan Shen
CPC分类号： H02J7/0052 , G06F1/266 , G06F13/385 , G06F13/4072 , G06F2213/0042 , H02J7/0045 , H02J7/0068 , H02J7/0081 , H02J2007/0062
摘要： A universal serial bus device includes: a core circuit having a first pin and a second pin, and having an input impedance looking into the core circuit from the first pin and the second pin; and a charging control circuit, coupled to the core circuit, arranged for selectively providing a voltage source to one of the first pin and the second pin; wherein the input impedance of the core circuit is configured to make the voltage source substantially intact when the voltage source is coupled to one of the first pin and the second pin.
摘要翻译： 通用串行总线装置包括：具有第一引脚和第二引脚的核心电路，并具有从第一引脚和第二引脚看入核心电路的输入阻抗; 以及连接到所述核心电路的充电控制电路，被布置为选择性地将电压源提供给所述第一引脚和所述第二引脚中的一个; 其中所述核心电路的输入阻抗被配置为当所述电压源耦合到所述第一引脚和所述第二引脚中的一个引脚时使所述电压源基本上完整。
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