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    Virtual microengine systems and methods
    1.
    发明申请
    Virtual microengine systems and methods 审中-公开
    虚拟微型发动机系统和方法

    公开(公告)号：US20060150165A1

    公开(公告)日：2006-07-06

    申请号：US11027785

    申请日：2004-12-30

    申请人： Donald Hooper ,  Prashant Chandra ,  James Guilford ,  Mark Rosenbluth

    发明人： Donald Hooper ,  Prashant Chandra ,  James Guilford ,  Mark Rosenbluth

    IPC分类号： G06F9/45

    CPC分类号： G06F9/455

    摘要： Systems and methods are disclosed for supporting virtual microengines in a multithreaded processor, such as a microengine running on a network processor. In one embodiment code is written for execution by a plurality of virtual microengines. The code is than compiled and linked for execution on a physical microengine, at which time the physical microengine's threads are assigned to thread groups corresponding to the virtual microengines. Internal next neighbor rings are allocated within the physical microengine to facilitate communication between the thread groups. The code can then be loaded onto the physical microengine and executed, with each thread group executing the code written for its corresponding virtual microengine.

    摘要翻译： 公开了用于在多线程处理器中支持虚拟微引擎的系统和方法，诸如在网络处理器上运行的微型引擎。 在一个实施例中，代码被写入以由多个虚拟微引擎执行。 代码被编译和链接以在物理微引擎上执行，此时物理微引擎的线程被分配给对应于虚拟微引擎的线程组。 内部下一个邻居环在物理微引擎内分配，以促进线程组之间的通信。 然后可以将代码加载到物理微引擎上并执行，每个线程组执行为其相应的虚拟微引擎编写的代码。

    Packet assembly
    3.
    发明申请
    Packet assembly 失效
    数据包组装

    公开(公告)号：US20050135353A1

    公开(公告)日：2005-06-23

    申请号：US10742189

    申请日：2003-12-18

    申请人： Prashant Chandra ,  Sridhar Lakshmanamurthy ,  Chen-Chi Kuo ,  Rohit Natarajan ,  Mark Rosenbluth

    发明人： Prashant Chandra ,  Sridhar Lakshmanamurthy ,  Chen-Chi Kuo ,  Rohit Natarajan ,  Mark Rosenbluth

    IPC分类号： H04L12/28 ,  H04L12/56 ,  H04L29/06 ,  H04L29/08

    CPC分类号： H04L69/166 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9042 ,  H04L49/9052 ,  H04L67/02 ,  H04L69/16 ,  H04L69/329 ,  H04L2012/5652

    摘要： In general, in one aspect, the disclosure describes a method of assembling a packet in memory. The method includes reading data included in a first segment of a packet divided into multiple segments and issuing a command to a memory controller that causes the memory controller to shift and write a subset of the read data to a memory coupled to the memory controller. The method also includes saving the remainder of the read data as a first residue, retrieving data included in a second segment of the packet, and writing at least a portion of the retrieved data and the first residue to the memory.

    摘要翻译： 通常，在一个方面，本公开描述了一种在存储器中组装分组的方法。 该方法包括读取分组到多个分组的分组的第一分段中的数据，并向存储器控制器发出命令，该命令使得存储器控制器将读取的数据的子集移位并写入耦合到存储器控制器的存储器。 该方法还包括将剩余的读取数据保存为第一残余，检索包含在分组的第二段中的数据，以及将所检索的数据和第一残差的至少一部分写入存储器。

    Memory controller
    4.
    发明申请
    Memory controller 有权
    内存控制器

    公开(公告)号：US20050135367A1

    公开(公告)日：2005-06-23

    申请号：US10741298

    申请日：2003-12-18

    申请人： Prashant Chandra ,  Sridhar Lakshmanamurthy ,  Chen-Chi Kuo ,  Rohit Natarajan ,  Mark Rosenbluth

    发明人： Prashant Chandra ,  Sridhar Lakshmanamurthy ,  Chen-Chi Kuo ,  Rohit Natarajan ,  Mark Rosenbluth

    IPC分类号： H04L12/28

    CPC分类号： G06F13/1678

    摘要： In general, in one aspect, the disclosure describes a memory controller. The controller includes an interface to a first memory and an interface to a bus coupling the memory controller to at least one processor. The controller also includes circuitry, responsive to read and write commands received over the bus from the at least one processor, to shift data by an amount identified by at least some of the read and write commands.

    摘要翻译： 通常，在一个方面，本公开描述了一种存储器控制器。 控制器包括到第一存储器的接口以及将存储器控制器耦合到至少一个处理器的总线的接口。 控制器还包括电路，响应于通过总线从至少一个处理器接收的读取和写入命令，将数据移位由至少一些读取和写入命令所标识的量。

    Traffic management
    5.
    发明申请
    Traffic management 审中-公开
    交通管理

    公开(公告)号：US20050018601A1

    公开(公告)日：2005-01-27

    申请号：US10612552

    申请日：2003-07-01

    申请人： Suresh Kalkunte ,  Hugh Wilkinson ,  Gilbert Wolrich ,  Mark Rosenbluth ,  Donald Hooper

    发明人： Suresh Kalkunte ,  Hugh Wilkinson ,  Gilbert Wolrich ,  Mark Rosenbluth ,  Donald Hooper

    IPC分类号： H04L12/56 ,  H04Q11/04 ,  H04L1/00

    CPC分类号： H04L12/5601 ,  H04L2012/561 ,  H04L2012/5636 ,  H04L2012/5679

    摘要： In general, in one aspect, the disclosure describes a system to process packets received over a network. The system includes a receive process of at least one thread of a network processor to receive data of packets belonging to different flows. The system also includes a transmit process of at least one thread to transmit packets received by the receive process. A scheduler process of at least one thread populates at least one schedule of flow service based, at least in part, on quality of service characteristics associated with the different flows. The schedule identifies different flow candidates for service. The system also includes a shaper process of at least one thread to select from the candidate flows for service from the at least one schedule.

    摘要翻译： 一般来说，一方面，本公开描述了一种处理通过网络接收的分组的系统。 该系统包括网络处理器的至少一个线程的接收处理，以接收属于不同流的分组的数据。 系统还包括至少一个线程的发送过程，以发送由接收过程接收的分组。 至少部分地基于与不同流相关联的服务质量特征，至少一个线程的调度器过程填充至少一个流服务调度。 计划确定不同的候选候选人的服务。 该系统还包括至少一个线程的整形过程，以从候选流中选择来自至少一个调度的服务。