Method of micromachining an integrated sensor on the surface of a
silicon wafer
    1.
    发明授权
    Method of micromachining an integrated sensor on the surface of a silicon wafer 失效
    在硅晶片的表面上微加工集成传感器的方法

    公开(公告)号:US5427975A

    公开(公告)日:1995-06-27

    申请号:US59222

    申请日:1993-05-10

    摘要: A method for micromachining the surface of a silicon substrate which encompasses a minimal number of processing steps. The method involves a preferential etching process in which a chlorine plasma etch is capable of laterally etching an N+ buried layer beneath the surface of the bulk substrate. Such a method is particularly suitable for forming sensing devices which include a small micromachined element, such as a bridge, cantilevered beam, membrane, suspended mass or capacitive element, which is supported over a cavity formed in a bulk silicon substrate. The method also permits the formation of such sensing devices on the same substrate as their controlling integrated circuits. This invention also provides novel methods by which such structures can be improved, such as through optimizing the dimensional characteristics of the micromachined element or by encapsulating the micromachined element.

    摘要翻译: 一种微加工硅衬底表面的方法,其包含最少数量的处理步骤。 该方法包括优先蚀刻工艺,其中氯等离子体蚀刻能够横向蚀刻在本体衬底的表面下面的N +掩埋层。 这种方法特别适用于形成感测装置,其包括小型微加工元件,例如桥,悬臂梁,膜,悬挂质量或电容元件,其被支撑在形成于体硅衬底中的空腔上。 该方法还允许在与它们的控制集成电路相同的衬底上形成这样的感测装置。 本发明还提供了通过优化微加工元件的尺寸特性或通过封装微加工元件来改善这种结构的新方法。

    Micromachined integrated pressure sensor with oxide polysilicon cavity
sealing
    2.
    发明授权
    Micromachined integrated pressure sensor with oxide polysilicon cavity sealing 失效
    微加工集成压力传感器,具有氧化物多孔腔密封

    公开(公告)号:US5531121A

    公开(公告)日:1996-07-02

    申请号:US375040

    申请日:1995-01-19

    摘要: A method is disclosed for micromachining the surface of a silicon substrate which encompasses a minimal number of processing steps. The method involves a preferential etching process in which a chlorine plasma etch is capable of laterally etching an N+ buried layer beneath the surface of the bulk substrate. Such a method is particularly suitable for forming sensing devices which include a small micromachined element, such as a bridge, cantilevered beam, membrane, suspended mass or capacitive element, which is supported over a cavity formed in a bulk silicon substrate. The method also permits the formation of such sensing devices on the same substrate as their controlling integrated circuits. This invention also provides novel methods by which such structures can be improved, such as through optimizing the dimensional characteristics of the micromachined element or by encapsulating the micromachined element.

    摘要翻译: 公开了一种微加工硅衬底的表面的方法,其包含最少数量的处理步骤。 该方法包括优先蚀刻工艺,其中氯等离子体蚀刻能够横向蚀刻在本体衬底的表面下面的N +掩埋层。 这种方法特别适用于形成感测装置,其包括小型微加工元件,例如桥,悬臂梁,膜,悬挂质量或电容元件,其被支撑在形成于体硅衬底中的空腔上。 该方法还允许在与它们的控制集成电路相同的衬底上形成这样的感测装置。 本发明还提供了通过优化微加工元件的尺寸特性或通过封装微加工元件来改善这种结构的新方法。

    Method of metal filled trench buried contacts
    3.
    发明授权
    Method of metal filled trench buried contacts 失效
    金属填充沟槽埋接方法

    公开(公告)号:US5213999A

    公开(公告)日:1993-05-25

    申请号:US576654

    申请日:1990-09-04

    摘要: A trench capacitor within an integrated circuit is provided which is filled with solid elemental metal. This metal-filled trench capacitor is formed by the following steps. First a trench is conventionally formed within a silicon substrate. A dielectric film is then blanket deposited onto the substrate and within the trench, so that the walls and bottom surface of the trench are completely covered. A metal-containing liquid solution is next deposited within the trench, and heated to a temperature sufficient to thermally decompose the metal compound within the liquid solution and drive off any solvent from the solution, thereby leaving a plate of elemental metal within the trench capacitor. The metal-filled capacitor is accordingly characterized by high electrical conductivity. The method may also be utilized to form a metal contact to a buried layer within an integrated circuit; a rectifying contact or Schottky diode; contacts to the substrate; metal diffusion barrier layer; and interconnection metallization.

    摘要翻译: 提供集成电路内的沟槽电容器,其填充有固体元素金属。 该金属填充的沟槽电容器通过以下步骤形成。 首先,沟槽通常形成在硅衬底内。 然后将电介质膜被覆盖地沉积到衬底上并在沟槽内,使得沟槽的壁和底表面被完全覆盖。 接着,在沟槽内沉积含金属的液体溶液,并加热到足以使液体溶液中的金属化合物热分解的温度,并从溶液中除去溶剂,从而在沟槽电容器内留下一块元素金属。 金属填充电容器的特征在于导电性高。 该方法还可用于与集成电路内的埋层形成金属接触; 整流触点或肖特基二极管; 与基板接触; 金属扩散阻挡层; 和互连金属化。

    Method for forming a micromachine motion sensor
    4.
    发明授权
    Method for forming a micromachine motion sensor 失效
    微机械运动传感器的形成方法

    公开(公告)号:US5547093A

    公开(公告)日:1996-08-20

    申请号:US305540

    申请日:1994-09-14

    申请人: Douglas R. Sparks

    发明人: Douglas R. Sparks

    IPC分类号: G01C19/5684 B44C1/22

    CPC分类号: G01C19/5684

    摘要: A method for forming a motion sensor for sensing motion or acceleration of a body, such as the type used in VCR cameras and onboard automotive and aerospace safety control system or navigational system. The motion sensor includes a sensing structure, such as a resonating metal ring and spring structure, which is supported above a substrate and circumscribed by an electrode pattern. The sensing structure is supported above the substrate by an electrically-conductive post located at the axis of motion. The electrodes serve to drive the ring into resonance, balance the sensing structure by inducing stiffness in the ring and springs, and sense rotary motion of the ring. To electrically interconnect the ring with the electrodes, three non-dielectric layers are formed on the substrate to form a radial conductor pattern, a concentric conductor pattern and a bias plane beneath the sensing structure. In accordance with this invention, one of the non-dielectric layers is a planarized doped polysilicon layer, while the remaining two non-dielectric layers are planarized and passivated metal layers. Additional accessories for enhancing the performance and reliability of the motion sensor include one or more g-stops which prevent excessive deflection, and particle getters.

    摘要翻译: 用于形成用于感测身体的运动或加速的运动传感器的方法,例如用于VCR照相机和车载汽车和航空航天安全控制系统或导航系统中的类型。 运动传感器包括感测结构,例如谐振金属环和弹簧结构,其被支撑在基板上并被电极图案限定。 感测结构通过位于运动轴线处的导电柱支撑在衬底上。 电极用于驱动环进入共振,通过在环和弹簧中引起刚度并感测环的旋转运动来平衡感测结构。 为了使环与电极电互连,在衬底上形成三个非电介质层,以在感测结构下形成径向导体图案,同心导体图案和偏置平面。 根据本发明,非电介质层之一是平坦化的掺杂多晶硅层,而剩余的两个非电介质层被平坦化和钝化金属层。 用于提高运动传感器的性能和可靠性的附加附件包括一个或多个防止过度偏转的g挡块和颗粒吸气器。

    Method for dielectrically isolating integrated circuits using doped
oxide sidewalls
    5.
    发明授权
    Method for dielectrically isolating integrated circuits using doped oxide sidewalls 失效
    使用掺杂氧化物侧壁对集成电路进行介电隔离的方法

    公开(公告)号:US5250837A

    公开(公告)日:1993-10-05

    申请号:US936720

    申请日:1992-08-31

    申请人: Douglas R. Sparks

    发明人: Douglas R. Sparks

    CPC分类号: H01L21/76237 H01L21/76294

    摘要: A method for dielectrically isolating a semiconductor integrated circuit is provided. Each integrated circuit is substantially surrounded by silicon oxide sidewalls which have been appropriately doped to be of an opposite conductivity type as the surrounding substrate. The doped silicon oxide sidewalls are formed prior to the growth of epitaxial silicon within the sidewalls. Upon deposition of the epitaxial silicon the dopant within the oxide sidewalls diffuses into the adjacent epitaxial silicon, thereby resulting in a heavily doped, low resistivity region of epitaxial silicon adjacent to and along the entire length of the oxide sidewall. This heavily doped region results in the substantial elimination of charge-depleting parasitic currents along the sidewalls during use of the integrated circuit. In addition, the heavily doped, low resistivity epitaxial region provides an electrically conductive contact to a buried layer within an integrated circuit having such a buried layer. Extremely thin and long, contacts can be made to the buried layer using this method, without the traditional need for long diffusion times which result in excessively wide diffusion zones.

    摘要翻译: 提供一种用于电介质隔离半导体集成电路的方法。 每个集成电路基本上被已被适当地掺杂成与周围衬底相反的导电类型的氧化硅侧壁包围。 在外延硅在侧壁内生长之前形成掺杂的氧化硅侧壁。 在沉积外延硅时,氧化物侧壁内的掺杂剂扩散到相邻的外延硅中,由此导致邻近和沿着氧化物侧壁整个长度的重掺杂的外延硅的低电阻率区域。 该重掺杂区域在集成电路的使用期间导致沿着侧壁的电荷耗尽寄生电流的显着消除。 此外,重掺杂的低电阻率外延区域提供与具有这种掩埋层的集成电路内的掩埋层的导电接触。 使用这种方法可以非常薄和长的接触到掩埋层,而不需要长的扩散时间,导致扩散区过宽。

    Method for dielectrically isolating integrated circuits using doped
oxide sidewalls

    公开(公告)号:US5250461A

    公开(公告)日:1993-10-05

    申请号:US871147

    申请日:1992-04-20

    申请人: Douglas R. Sparks

    发明人: Douglas R. Sparks

    摘要: A method for dielectrically isolating a semiconductor integrated circuit is provided. Each integrated circuit is substantially surrounded by silicon oxide sidewalls which have been appropriately doped to be of an opposite conductivity type as the surrounding substrate. The doped silicon oxide sidewalls are formed prior to the growth of epitaxial silicon within the sidewalls. Upon deposition of the epitaxial silicon the dopant within the oxide sidewalls diffuses into the adjacent epitaxial silicon, thereby resulting in a heavily doped, low resistivity region of epitaxial silicon adjacent to and along the entire length of the oxide sidewall. This heavily doped region results in the substantial elimination of charge-depleting parasitic currents along the sidewalls during use of the integrated circuit. In addition, the heavily doped, low resistivity epitaxial region provides an electrically conductive contact to a buried layer within an integrated circuit having such a buried layer. Extremely thin and long, contacts can be made to the buried layer using this method, without the traditional need for long diffusion times which result in excessively wide diffusion zones.

    Removing metal precipitates from semiconductor devices
    7.
    发明授权
    Removing metal precipitates from semiconductor devices 失效
    从半导体器件去除金属沉淀物

    公开(公告)号:US4732874A

    公开(公告)日:1988-03-22

    申请号:US919324

    申请日:1986-10-15

    申请人: Douglas R. Sparks

    发明人: Douglas R. Sparks

    CPC分类号: H01L21/324

    摘要: Rapid thermal annealing, involving rapid heating to a temperature of between 550 degrees C. and 750 degree C. for between 30 and 90 seconds and rapid cooling, is used to dissolve the precipitates of transition metals which tend to occur in a silicon wafer and to keep such metals in solution after cooling. Such annealing can be used in the manufacture of bipolar transistors to limit the emitter-collector shorting caused by metallic precipitates. It is also useful more generally to improve the leakage current of p-n junctions either in diodes or as parts of bipolar or field-effect transistors.

    摘要翻译: 快速热退火涉及快速加热至550摄氏度至750摄氏度的温度,持续30至90秒并快速冷却,用于溶解倾向于在硅晶片中发生的过渡金属的沉淀物,以及 冷却后将这些金属保存在溶液中。 这种退火可以用于制造双极晶体管,以限制由金属沉淀物引起的发射极 - 集电极短路。 更一般地,改善二极管中的p-n结或作为双极或场效应晶体管的部分的漏电流也是有用的。