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公开(公告)号：US20210330279A1
公开(公告)日：2021-10-28
申请号：US17241417
申请日：2021-04-27
Applicant: ESS Technology, Inc.
Inventor： Dustin Dale Forman , Christian Leth Petersen , A. Martin Mallinson
Abstract: An improved method and apparatus for detecting and measuring one or more biometric parameters of a user using a computing device in conjunction with an electroacoustic (audio) transducer is described. A first mode in which the audio transducer produces sound is disabled, and the device is placed in a second mode of operation in which a biometric signal is recovered from the transducer using a “back” audio signal. The biometric signal may then be measured or analyzed. The first mode is disabled by temporarily creating a high impedance between circuitry producing the audio signal and the transducer, while the biometric parameter is measured. This allows for detection of the biometric event without the need for significant additional components or circuitry. The computing device may most conveniently be a smartphone, but the approach described herein may also be easily and usefully applied to tablets, laptop or desktop computers or other devices.
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公开(公告)号：US10433046B2
公开(公告)日：2019-10-01
申请号：US16130979
申请日：2018-09-13
Applicant: ESS Technology, Inc.
Inventor： A. Martin Mallinson , Robert Lynn Blair , Christian Leth Petersen , Paul Christopher Scowen
Abstract: An improved system and method for reducing the ambient noise experienced by a user listening to an earpiece without the use of a microphone is disclosed. An “ambient noise signal” created by the sound pressure wave of the ambient noise acting on the earpiece transducer is obtained. In some embodiments, the ambient noise signal is inverted and fed back, and the inverted signal is added to the intended audio signal being sent to the earpiece so that the ambient noise is cancelled. In other embodiments, a processor receives the ambient noise signal and predicts the modification to the intended audio signal needed to counteract the ambient noise. The ambient noise signal may be obtained by comparing the actual signal across the earpiece transducer to the intended audio signal, or by detecting variations in the current across the transducer from the current generated to drive the transducer.
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公开(公告)号：US20150222249A1
公开(公告)日：2015-08-06
申请号：US14619940
申请日：2015-02-11
Applicant: ESS Technology, Inc.
Inventor： A. Martin Mallinson
Abstract: Channel select filter circuits are described. One circuit implements a multiplying element and digital-to-analog converter as a differential current mode device. Another circuit implementing a multiplying element and digital-to-analog converter with weighted addition, deferred after multiplication of the digital-to-analog converter and multiplier combination. In one such circuit, substantially equal current source magnitudes are in different columns of the circuit. Another such circuit, with substantially equal current source magnitudes, uses non-radix2. Another such circuit, with substantially equal current source magnitudes, has partial segmentation. Another circuit implements a multiplying element and digital-to-analog converter, with partial segmentation, scrambling bit allocation for elements. One such circuit scrambles bit allocation on equally weighted segments, as described herein. Another circuit implements a multiplying element and digital-to-analog converter with selective enablement of duplicate current source devices. Another circuit implements a multiplying element and digital-to-analog converter with variable effective length of the digital-to-analog converter. In one such circuit one or more current sources of a multiplier element are deselected to remove a noise contribution of the multiplier element, as described herein. A complex filter circuit includes a pair of real finite impulse response filter circuits performing addition and subtraction in current domain, sharing a common resistor network to perform weighted addition. One such circuit further includes a second pair of real finite impulse response filter circuits performing addition and subtraction in current domain, sharing a second common resistor network to perform weighted addition.
Abstract translation: 描述通道选择滤波器电路。 一个电路实现了一个乘法元件和数 - 模转换器作为差分电流模式器件。 实现乘法元件的另一个电路和具有加权相加的数模转换器，在数模转换器和乘法器组合的乘法之后延迟。 在一个这样的电路中，基本相等的电流源幅度在电路的不同列中。 另一个具有基本上相等的电流源幅度的这种电路使用非基数2。 具有基本相等的电流源幅度的另一个这样的电路具有部分分割。 另一电路实现了乘法元件和数模转换器，具有部分分段，元件的加扰位分配。 如这里所述，一个这样的电路对等加权的片段进行比特分配。 另一个电路实现了具有选择性地启用重复的电流源装置的乘法元件和数模转换器。 另一电路实现了具有可变有效长度的数模转换器的乘法元件和数 - 模转换器。 在一个这样的电路中，如本文所述，乘法器元件的一个或多个电流源被取消选择以去除乘法器元件的噪声贡献。 复合滤波器电路包括一对实际有限脉冲响应滤波器电路，其在当前域中执行加法和减法，共享公共电阻网络以执行加权相加。 一个这样的电路还包括第二对实际有限脉冲响应滤波器电路，其在当前域中执行加法和减法，共享第二公共电阻网络以执行加权相加。
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4.发明申请公开(公告)号：US20150040085A1
公开(公告)日：2015-02-05
申请号：US14446780
申请日：2014-07-30
Applicant: ESS Technology, Inc.
Inventor： A. Martin Mallinson
IPC: G06F17/50
CPC classification number: G06F17/5045 , G06F17/5063 , G06F2217/02 , G06F2217/06
Abstract: A method and system for generating and matching complex series and/or parallel combinations of nominally identical initial elements to achieve an arbitrary compound value is disclosed. A recursive algorithm successively adds one or more similar nominal two-terminal elements to generate a series and/or parallel compound combination of nominal elements, the compound combination having a desired impedance. The compound value, and thus the ratio between two compound values, can be determined to almost any desired degree of accuracy, with potential errors greatly reduced from those typical in the construction of individual elements of different values. Since the initial elements are nominally identical, the compound value, and the ratio between values, depends primarily upon the connections of the initial elements, rather than their geometry, and thus remain virtually constant regardless of variations in the manufacturing process.
Abstract translation: 公开了一种用于产生和匹配名义上相同的初始元素以实现任意化合物值的复杂串联和/或并联组合的方法和系统。 递归算法连续地添加一个或多个相似的标称两端元件以产生具有期望阻抗的复合组合的标称元件的串联和/或并联复合组合。 可以将化合物值以及因此两个化合物值之间的比率确定为几乎任何所需的准确度，其中潜在误差比在不同值的各个元素的构造中典型地降低。 由于初始元素名义上相同，所以化合物值和值之间的比例主要取决于初始元素的连接而不是其几何形状，并且因此保持实质上恒定，而与制造过程中的变化无关。
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公开(公告)号：US20140375356A1
公开(公告)日：2014-12-25
申请号：US14314882
申请日：2014-06-25
Applicant: ESS Technology, Inc.
Inventor： A. Martin Mallinson
IPC: H03K19/003 , H03K19/0185
CPC classification number: H03K19/00315 , H03K5/133 , H03K5/14 , H03K5/15046 , H03K19/00361 , H03K19/00369 , H03K19/018521
Abstract: A delay circuit in which the delay is independent of variations in the power supply which powers the logic gates of the delay circuit is disclosed. By separating the CMOS transistors that form each logic gate by additional CMOS bias transistors which are biased at a controlled voltage, variations in the gate delay of the inverter transistors due to variations in the power supply voltage for the inverter transistors may be minimized. In one embodiment, the constant bias voltage may be provided by a constant current source comprising a series of amplifiers each having a gain significantly less than one connected to a triple cascode.
Abstract translation: 公开了一种延迟电路，其延迟与为延迟电路的逻辑门供电的电源的变化无关。 通过将偏置在受控电压的附加CMOS偏置晶体管分离形成每个逻辑门的CMOS晶体管，由于逆变器晶体管的电源电压的变化，反相晶体管的栅极延迟的变化可能被最小化。 在一个实施例中，恒定偏置电压可以由包括一系列放大器的恒定电流源提供，每个放大器的增益明显小于连接到三重共源共栅的一个。
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Patent Agency Ranking
公开(公告)号：US20140103977A1
公开(公告)日：2014-04-17
申请号：US14055772
申请日：2013-10-16
Applicant: ESS Technology, Inc.
Inventor： Hu Jing Yao , Dustin Dale Forman , A. Martin Mallinson
IPC: H03L7/195
Abstract: A method and system is disclosed in which the phase detector in a phase-locked loop is able to run at the fastest speed appropriate for a reference signal. A frequency offset is added, to the output frequency of the phase-locked loop, to alter the frequency fed to the frequency divider which would receive the output frequency in a conventional PLL to an intermediate frequency. The frequency offset is selected so that the ratio of the intermediate frequency to the reference frequency is a simple fraction, and preferably an integer, i.e., the intermediate frequency is a multiple of the reference frequency. In cases where the relationship between the output frequency and the reference frequency is largely relatively prime, the phase detector is thus able to receive signals at the frequency of the reference signal and operate at the fastest speed appropriate for the reference signal.
Abstract translation: 公开了一种方法和系统，其中锁相环中的相位检测器能够以适合于参考信号的最快速度运行。 将频偏添加到锁相环的输出频率，以改变馈送到分频器的频率，该分频器将常规PLL中的输出频率接收到中频。 选择频率偏移，使得中频与参考频率的比率是简单的分数，优选地是整数，即中频是参考频率的倍数。 在输出频率和参考频率之间的关系很大程度上相对于素数的情况下，相位检测器因此能够以参考信号的频率接收信号并且以适合于参考信号的最快速度进行操作。
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公开(公告)号：US11211938B2
公开(公告)日：2021-12-28
申请号：US17241775
申请日：2021-04-27
Applicant: ESS Technology, Inc.
Inventor： A. Martin Mallinson
Abstract: A digitally controlled oscillator (DCO) that generates an output frequency clock signal without drift and can be rapidly locked to an input or reference clock is described. A variable-modulus-fixed-increment form of DCO is configured to divide the frequency of a nominally fixed frequency oscillator. A constant is derived from the ratio of a fixed increment to the desired output frequency; this constant is multiplied by the frequency of the oscillator and the modulus adjusted to keep the ratio of the input clock and the output clock constant. The frequency of the oscillator is conveniently measured by counting the number of cycles between input cycles of a reference frequency. The oscillator must be greater in frequency than the expected output and is most accurate in cases where the reference frequency is low compared to the expected output frequency.
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公开(公告)号：US20210336625A1
公开(公告)日：2021-10-28
申请号：US17241775
申请日：2021-04-27
Applicant: ESS Technology, Inc.
Inventor： A. Martin Mallinson
Abstract: A digitally controlled oscillator (DCO) that generates an output frequency clock signal without drift and can be rapidly locked to an input or reference clock is described. A variable-modulus-fixed-increment form of DCO is configured to divide the frequency of a nominally fixed frequency oscillator. A constant is derived from the ratio of a fixed increment to the desired output frequency; this constant is multiplied by the frequency of the oscillator and the modulus adjusted to keep the ratio of the input clock and the output clock constant. The frequency of the oscillator is conveniently measured by counting the number of cycles between input cycles of a reference frequency. The oscillator must be greater in frequency than the expected output and is most accurate in cases where the reference frequency is low compared to the expected output frequency.
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公开(公告)号：US11081097B2
公开(公告)日：2021-08-03
申请号：US16917085
申请日：2020-06-30
Applicant: ESS Technology, Inc.
Inventor： Christian Leth Petersen , Shawn William Scarlett , A. Martin Mallinson
IPC: G10K11/178 , H04R1/10
Abstract: A system and method for passively balancing electroacoustic transducers so that sounds other than the transducer's output can be detected. A transducer producing audio output based upon an input audio signal can operate in reverse to produce a signal in response to the impact of external sound upon the transducer from another source. This “reverse” or “microphone” signal represents the sound from the other source. Transducers are operated in monophonic mode, each in opposite polarity to the other thus canceling out and leaving only the microphone signal created by the transducers, i.e., a signal representing the external sound. The microphone signal can be amplified, and can be filtered and processed to identify and/or obtain various types of information about the sound received by the transducers.
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公开(公告)号：US20210005175A1
公开(公告)日：2021-01-07
申请号：US16917085
申请日：2020-06-30
Applicant: ESS Technology, Inc.
Inventor： Christian Leth Petersen , Shawn William Scarlett , A. Martin Mallinson
IPC: G10K11/178 , H04R1/10
Abstract: A system and method for passively balancing electroacoustic transducers so that sounds other than the transducer's output can be detected. A transducer producing audio output based upon an input audio signal can operate in reverse to produce a signal in response to the impact of external sound upon the transducer from another source. This “reverse” or “microphone” signal represents the sound from the other source. Transducers are operated in monophonic mode, each in opposite polarity to the other thus canceling out and leaving only the microphone signal created by the transducers, i.e., a signal representing the external sound. The microphone signal can be amplified, and can be filtered and processed to identify and/or obtain various types of information about the sound received by the transducers.
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