摘要:
A tuning arrangement with a polyphase low IF mixer, a polyphase low IF filter and a polyphase group delay equalizer. The polyphase group delay equalizer has only one or more pole-zero pairs in the upper half of the complex frequency plane representing the transfer function of the equalizer.
摘要:
The present application relates to at least one digitally controlled oscillator and a data modulation device. More particularly, the digital polar transmitter comprises at least one digitally controlled oscillator configured to generate at least one frequency. The digital polar transmitter comprises a data modulation device, wherein the data modulation device comprises at least one data input terminal, at least one output terminal, and at least one frequency input terminal, wherein the output terminal is connected to the digitally controlled oscillator. The digital polar transmitter comprises a phase measuring device configured to measure phase information from the output signal of the data modulation device for every frequency sample. The digital polar transmitter comprises a phase error detecting device configured to detect a phase error at least depending on the measured phase information, wherein the phase error detecting device is configured to apply the detected phase error to the output signal of the data modulation device.
摘要:
An output stage (1) for a digital RF transmitter is provided. The output stage comprises: an input adapted to receive an input signal (RFin, b7-b0) to be transmitted; a plurality N of power amplification sections (S1, S2, S3, S4); and an output (A, B) providing an output voltage signal. Each of the N power amplification sections (S1, S2, S3, S4) is arranged to receive the input signal (RFin, b7-b0) and comprises a transformer (T1, T2, T3, T4) adapted to provide a respective output signal. Each transformer comprises a primary stage and a secondary stage; the secondary stages of the transformers (T1, T2, T3, T4) of the N power amplification sections (S1, S2, S3, S4) are combined such that a combined output voltage signal of the output stage is provided. The N power amplification sections (S1, S2, S3, S4) are adapted such that the input signal (RFin, b7-b0) is latched by clock signals (clock1, clock2, clock3, clock4) comprising different phases.
摘要:
An antenna assembly for wireless communication equipment comprises an antenna structure comprising at least a loop type antenna arranged to deliver a first current when it is used in a balanced mode and/or a second current when it is used in an unbalanced mode with respect to a ground plane from received radio signals, and current extraction device coupled to the antenna structure and arranged to be placed in at least a first state in which the current extraction device delivers the first or second current and a second state in which the current extraction device simultaneously delivers the first and second currents either separately or mixed together.
摘要:
A radio transmission system is disclosed for operating in a multipath transmission environment having improved reception, and in the case of bi-directional systems, also improved transmission. This is achieved by using at least two reception beams, corresponding to one fixed reception beam and one scanning reception beam, and by continuously evaluating the quality of these beams as to their signal-to-noise-and-interference ratios or bit-error-rates (BERs). The best beam is dynamically chosen to be the fixed beam. Alternatively, the fixed beam is updated with the best beam acquired by the scanning beam as compared to the current fixed beam. In a bi-directional system, the receiving radio apparatus applies the direction of the best reception beam for transmission to the opposite radio apparatus.
摘要:
A multi-tuner apparatus comprises a splitter (S) for received RF signals. The splitter has a splitter output (U) for connection to a plurality of tuners. To reduce signal degradation and dissipation the output impedance of the splitter output is substantially lower than the input impedance of each of the tuners.
摘要:
The present application relates to a digital modulator comprising an output stage comprising a number of unit cell arrays, and a sampling stage. The present application relates also to a communication device comprising said digital modulator, a method for digitally modulating and a computer program product. More particularly, the digital modulator comprises an output stage comprising a number of unit cell arrays, wherein the output stage comprises at least one carrier frequency signal input terminal configured to receive a carrier frequency signal. The digital modulator comprises a sampling stage connectable to the output stage, wherein the sampling stage is configured to oversample at least one data input signal. The digital modulator comprises at least one sampling clock generating device configured to generate at least one sampling clock signal depending on the number of arranged unit cell arrays and the carrier frequency signal.
摘要:
A harmonic rejection mixer unit is provided which comprises an input (RF), at least one harmonic rejection unit (HRU) with at least two transistor units (T3a, T3b; T4a, T4b) for multiplying an input signal from the input (RF) with a multiplication signal (ELO). The harmonic rejection mixer unit furthermore comprises a transistor control signal generating unit (GGU) for generating transistor control signals (GS1-GS4) for the at least two transistor units (T3a, T3b; T4a, T4b) of the at least one harmonic rejection unit (HRU) by deriving the transistor control signals (GS1-GS4) from a local oscillator signal (LO). The transistor control signals (GS3, GS4) for the at least two transistor units (T3a, T3b; T4a, T4b) are generated with a duty cycle of
摘要:
An electronic device comprising a passive harmonic-rejection mixer. The passive harmonic rejection mixer has an input connected to several sub-mixer stages, and the sub-mixer stages are connected to a summing module for generating the output. Each sub-mixing stage comprises a gating module and a respective amplifier, the gating module adapted to selectively pass the input signal or the input signal with inverted polarity under the control of control signals.
摘要:
A signal processing arrangement (REC) comprises a filter (PPF) with variable filter elements (FE). A switching circuit (SWCT) switches a filter element (FE1) and, subsequently, another filter element (FE3) from a filter state to an adjustment state and back again to the filter state. A filter element that is in the filter state contributes to a suppression of unwanted signals. A filter element that is in the adjustment state affects a characteristic of a measurement signal (Sm). An adjustment circuit (ADCT) adjusts the filter element that is in the adjustment state so that the characteristic of the measurement signal is substantially equal to a target value (TV).