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1.发明授权Superpage coalescing which supports read/write access to a new virtual superpage mapping during copying of physical pages 失效Superpage coalescing在复制物理页面期间支持对新的虚拟超级页面映射的读/写访问公开(公告)号：US08417913B2
公开(公告)日：2013-04-09
申请号：US10713733
申请日：2003-11-13
IPC分类号： G06F12/00
CPC分类号： G06F12/1045
摘要： A method of assigning virtual memory to physical memory in a data processing system allocates a set of contiguous physical memory pages for a new page mapping, instructs the memory controller to move the virtual memory pages according to the new page mapping, and then allows access to the virtual memory pages using the new page mapping while the memory controller is still copying the virtual memory pages to the set of physical memory pages. The memory controller can use a mapping table which temporarily stores entries of the old and new page addresses, and releases the entries as copying for each entry is completed. The translation lookaside buffer (TLB) entries in the processor cores are updated for the new page addresses prior to completion of copying of the memory pages by the memory controller. The invention can be extended to non-uniform memory array (NUMA) systems. For systems with cache memory, any cache entry which is affected by the page move can be updated by modifying its address tag according to the new page mapping. This tag modification may be limited to cache entries in a dirty coherency state. The cache can further relocate a cache entry based on a changed congruence class for any modified address tag.
摘要翻译： 将虚拟存储器分配给数据处理系统中的物理存储器的方法为新的页面映射分配一组连续的物理存储器页面，指示存储器控制器根据新的页面映射移动虚拟存储器页面，然后允许访问 虚拟内存页面使用新页面映射，而内存控制器仍将虚拟内存页面复制到物理内存页面集合。 存储器控制器可以使用临时存储旧页面地址和新页面地址的条目的映射表，并且对于每个条目的拷贝完成，释放条目。 在由存储器控制器完成对存储器页面的复制之前，处理器核心中的翻译后备缓冲器（TLB）条目针对新的页地址进行更新。 本发明可以扩展到非均匀存储器阵列（NUMA）系统。 对于具有缓存内存的系统，可以通过根据新页面映射修改其地址标签来更新受页面移动影响的任何缓存条目。 该标签修改可能被限制在脏相关性状态下的高速缓存条目。 高速缓存可以根据修改后的地址标签的改变的一致性类别进一步重新定位缓存条目。
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2.发明申请公开(公告)号：US20080263284A1
公开(公告)日：2008-10-23
申请号：US12145034
申请日：2008-06-24
申请人： Dilma Menezes da Silva , Elmootazbellah Nabil Elnozahy , Orran Yaakov Krieger , Hazim Shafi , Xiaowei Shen , Balaram Sinharoy , Robert Brett Tremaine
发明人： Dilma Menezes da Silva , Elmootazbellah Nabil Elnozahy , Orran Yaakov Krieger , Hazim Shafi , Xiaowei Shen , Balaram Sinharoy , Robert Brett Tremaine
IPC分类号： G06F12/08
CPC分类号： G06F12/08 , G06F12/0893 , G06F2212/251 , G06F2212/253
摘要： Methods, systems, and media for reducing memory latency seen by processors by providing a measure of control over on-chip memory (OCM) management to software applications, implicitly and/or explicitly, via an operating system are contemplated. Many embodiments allow part of the OCM to be managed by software applications via an application program interface (API), and part managed by hardware. Thus, the software applications can provide guidance regarding address ranges to maintain close to the processor to reduce unnecessary latencies typically encountered when dependent upon cache controller policies. Several embodiments utilize a memory internal to the processor or on a processor node so the memory block used for this technique is referred to as OCM.
摘要翻译： 考虑通过操作系统提供对软件应用（OCM）的控制的措施来减少处理器所看到的存储器延迟的方法，系统和媒体。 许多实施例允许OCM的一部分由软件应用程序通过应用程序接口（API）和由硬件管理的部分来管理。 因此，软件应用程序可以提供关于地址范围的指导，以保持靠近处理器，以减少在依赖于缓存控制器策略时通常遇到的不必要的延迟。 几个实施例利用处理器内部或处理器节点上的存储器，因此用于该技术的存储器块被称为OCM。
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3.发明授权公开(公告)号：US07437517B2
公开(公告)日：2008-10-14
申请号：US11032876
申请日：2005-01-11
申请人： Dilma Menezes da Silva , Elmootazbellah Nabil Elnozahy , Orran Yaakov Krieger , Hazim Shafi , Xiaowei Shen , Balaram Sinharoy , Robert Brett Tremaine
发明人： Dilma Menezes da Silva , Elmootazbellah Nabil Elnozahy , Orran Yaakov Krieger , Hazim Shafi , Xiaowei Shen , Balaram Sinharoy , Robert Brett Tremaine
CPC分类号： G06F12/08 , G06F12/0893 , G06F2212/251 , G06F2212/253
摘要： Methods, systems, and media for reducing memory latency seen by processors by providing a measure of control over on-chip memory (OCM) management to software applications, implicitly and/or explicitly, via an operating system are contemplated. Many embodiments allow part of the OCM to be managed by software applications via an application program interface (API), and part managed by hardware. Thus, the software applications can provide guidance regarding address ranges to maintain close to the processor to reduce unnecessary latencies typically encountered when dependent upon cache controller policies. Several embodiments utilize a memory internal to the processor or on a processor node so the memory block used for this technique is referred to as OCM.
摘要翻译： 考虑通过操作系统提供对软件应用（OCM）的控制的措施来减少处理器所看到的存储器延迟的方法，系统和媒体。 许多实施例允许OCM的一部分由软件应用程序通过应用程序接口（API）和由硬件管理的部分来管理。 因此，软件应用程序可以提供关于地址范围的指导，以保持靠近处理器，以减少在依赖于缓存控制器策略时通常遇到的不必要的延迟。 几个实施例利用处理器内部或处理器节点上的存储器，因此用于该技术的存储器块被称为OCM。
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4.发明授权公开(公告)号：US07934061B2
公开(公告)日：2011-04-26
申请号：US12145034
申请日：2008-06-24
申请人： Dilma Menezes da Silva , Elmootazbellah Nabil Elnozahy , Orran Yaakov Krieger , Hazim Shafi , Xiaowei Shen , Balaram Sinharoy , Robert Brett Tremaine
发明人： Dilma Menezes da Silva , Elmootazbellah Nabil Elnozahy , Orran Yaakov Krieger , Hazim Shafi , Xiaowei Shen , Balaram Sinharoy , Robert Brett Tremaine
CPC分类号： G06F12/08 , G06F12/0893 , G06F2212/251 , G06F2212/253
摘要： Methods, systems, and media for reducing memory latency seen by processors by providing a measure of control over on-chip memory (OCM) management to software applications, implicitly and/or explicitly, via an operating system are contemplated. Many embodiments allow part of the OCM to be managed by software applications via an application program interface (API), and part managed by hardware. Thus, the software applications can provide guidance regarding address ranges to maintain close to the processor to reduce unnecessary latencies typically encountered when dependent upon cache controller policies. Several embodiments utilize a memory internal to the processor or on a processor node so the memory block used for this technique is referred to as OCM.
摘要翻译： 考虑通过操作系统提供对软件应用（OCM）的控制的措施来减少处理器所看到的存储器延迟的方法，系统和媒体。 许多实施例允许OCM的一部分由软件应用程序通过应用程序接口（API）和由硬件管理的部分来管理。 因此，软件应用程序可以提供关于地址范围的指导，以保持靠近处理器，以减少在依赖于缓存控制器策略时通常遇到的不必要的延迟。 几个实施例利用处理器内部或处理器节点上的存储器，因此用于该技术的存储器块被称为OCM。
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公开(公告)号：US06701421B1
公开(公告)日：2004-03-02
申请号：US09640541
申请日：2000-08-17
IPC分类号： G06F1208
CPC分类号： G06F9/5016 , G06F9/4401 , G06F12/0813
摘要： A method for allocating memory in a data processing system in which a configuration table indicative of the system's physical memory is generated following a boot event. The configuration table is then modified to identify a portion of the system's physical memory thereby hiding the remaining portion from the operating system. Subsequently, a memory allocation request is initiated by an application program. A device driver invoked by the application program then maps physical memory from the hidden portion to the application's virtual address space to satisfy the application request. The application program may be executing on a first node of a multi-node system in which each node is associated with its own local memory, In this embodiment, the node on which the allocated physical memory is located may be derived from the allocation request thereby facilitating application level, allocation of specified portions of physical memory.
摘要翻译： 一种用于在数据处理系统中分配存储器的方法，其中在引导事件之后生成指示系统的物理存储器的配置表。 然后修改配置表以识别系统的物理存储器的一部分，从而隐藏来自操作系统的剩余部分。 随后，应用程序启动存储器分配请求。 应用程序调用的设备驱动程序然后将物理内存从隐藏部分映射到应用程序的虚拟地址空间，以满足应用程序请求。 应用程序可以在其中每个节点与其自己的本地存储器相关联的多节点系统的第一节点上执行。在该实施例中，可以从分配请求导出分配的物理存储器所在的节点 促进应用程序级别，物理内存的指定部分的分配。
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公开(公告)号：US08452850B2
公开(公告)日：2013-05-28
申请号：US09736349
申请日：2000-12-14
CPC分类号： G06F17/30864 , G06F17/30902
摘要： In one embodiment, an improved method for crawling a web site is provided. At least one page of the web site has a reference for executing by a browser to produce an address for a next page. The web site is crawled by the crawler program, which includes querying the web site server. The crawler parses such a reference from one of the web pages, and sends the reference to an applet running in the browser. The address for the next page is determined by the browser responsive to the reference. The address is then sent to the crawler. In an application of the improved crawler, the crawler is used for reducing dynamic data generation on the web site server. In this application, at least some of the web pages are dynamically generated responsive to the crawler queries. The server generated web pages are processed to generate corresponding processed versions of the web pages, so that the processed versions can be served in response to future queries, reducing dynamic generation of web pages by the server.
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公开(公告)号：US08370517B2
公开(公告)日：2013-02-05
申请号：US09965013
申请日：2001-09-27
申请人： Patrick Joseph Bohrer , Bishop Chapman Brock , Elmootazbellah Nabil Elnozahy , Ramakrishnan Rajamony , Freeman Leigh Rawson, III
发明人： Patrick Joseph Bohrer , Bishop Chapman Brock , Elmootazbellah Nabil Elnozahy , Ramakrishnan Rajamony , Freeman Leigh Rawson, III
IPC分类号： G06F15/16
CPC分类号： G06F1/3203 , G06F1/324 , H04L29/06 , H04L67/1002 , H04L67/1008 , H04L67/1014 , H04L67/1029 , H04L67/1031 , H04L69/24 , H04L69/329 , Y02D10/126
摘要： A data processing network and method for conserving energy in which an initial negotiation between a network server and a switch to which the server is connected is performed to establish an initial operating frequency of the server-switch link. An effective data rate of the server is determined based on network traffic at the server. Responsive to determining that the effective data rate is materially different than the current operating frequency, a subsequent negotiation is performed to establish a modified operating frequency where the modified operating frequency is closer to the effective data rate than the initial operating frequency. The determination of the effective date rate and the contingent initiation of a subsequent negotiation may be repeated periodically during the operating of the network. In one embodiment, the initial and subsequent negotiation are compliant with the IEEE 802.3 standard.
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8.发明授权Efficient identification of candidate pages and dynamic response in a NUMA computer 失效在NUMA计算机中有效识别候选页面和动态响应公开(公告)号：US06499028B1
公开(公告)日：2002-12-24
申请号：US09282625
申请日：1999-03-31
申请人： Bishop Chapman Brock , Eli Chiprout , Elmootazbellah Nabil Elnozahy , David Brian Glasco , Ramakrishnan Rajamony , Freeman Leigh Rawson, III , Ronald Lynn Rockhold
发明人： Bishop Chapman Brock , Eli Chiprout , Elmootazbellah Nabil Elnozahy , David Brian Glasco , Ramakrishnan Rajamony , Freeman Leigh Rawson, III , Ronald Lynn Rockhold
IPC分类号： G06F1700
CPC分类号： G06F11/3409 , G06F11/3414 , G06F11/3471 , G06F11/3495 , G06F12/08 , G06F12/0813 , G06F2201/81 , G06F2201/86 , G06F2201/87 , G06F2201/88 , G06F2212/2542 , Y10S707/99934
摘要： A performance monitor configured to count memory transactions and to issue an interrupt to the computer system if the monitor detects a specified number of transactions associated with a particular segment of the physical address space of the system. The monitor includes an interface suitable for coupling to an interconnect network of a computer system and configured to extract physical address information from a transaction traversing the interconnect network, a translation module adapted for associating the extracted physical address with one of a plurality of memory blocks and, in response thereto, incrementing a memory block counter corresponding to the memory block, and an interrupt unit configured to assert an interrupt if the block counter exceeds a predetermined value. The interface unit is configurable to selectively monitor either incoming or outgoing transactions and the translation unit preferably includes a plurality of region filters each comprising one or more of the memory blocks. In the preferred embodiment, the plurality of block counters are implemented with a random access memory device. In one embodiment useful for simulating operation of the system and for checking the design of the performance monitor, the monitor further includes a transaction generator coupled to the interconnect network and configured to issue specified remote memory transactions at specified intervals if a monitor enable bit of the performance monitor is disabled. In one embodiment, the transaction generator is configurable to issue either outgoing transactions or incoming transactions.
摘要翻译： 如果监视器检测到与系统的物理地址空间的特定段相关联的指定数量的事务，则性能监视器被配置为对存储器事务进行计数并向计算机系统发出中断。 监视器包括适于耦合到计算机系统的互连网络并被配置为从穿过互连网络的事务提取物理地址信息的接口，适于将所提取的物理地址与多个存储器块中的一个相关联的翻译模块，以及 响应于此，增加对应于存储块的存储器块计数器，以及中断单元，被配置为在块计数器超过预定值时断言中断。 接口单元可配置为选择性地监视输入或输出事务，并且转换单元优选地包括多个区域滤波器，每个区域滤波器包括一个或多个存储器块。 在优选实施例中，多个块计数器由随机存取存储器件实现。 在一个实施例中有用于模拟系统的操作和用于检查性能监视器的设计，监视器还包括耦合到互连网络并被配置为以特定间隔发布指定的远程存储器事务的事务发生器，如果监视器使能位 性能监视器被禁用。 在一个实施例中，事务生成器可配置为发出传出事务或传入事务。
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公开(公告)号：US06442654B1
公开(公告)日：2002-08-27
申请号：US09458406
申请日：1999-12-10
申请人： Bishop Chapman Brock , Eli Chiprout , Elmootazbellah Nabil Elnozahy , Ramakrishnan Rajamony , Freeman Leigh Rawson, III , Ronald Lynn Rockhold
发明人： Bishop Chapman Brock , Eli Chiprout , Elmootazbellah Nabil Elnozahy , Ramakrishnan Rajamony , Freeman Leigh Rawson, III , Ronald Lynn Rockhold
IPC分类号： G06F1200
CPC分类号： H04L67/2842
摘要： A system and method for providing in-server caching of shared data involves a server program that defines a server cache in RAM of a server machine and stores a selected file in the server cache. If a cached file is modified through the file system interface of the operating system of the server machine, the operating system automatically issues an upcall to the server program, the upcall identifying the modified file. In response to receipt of the upcall, the server program removes the modified file from the server cache. In one embodiment, the server program responds to a client request requiring access to a requested file by obtaining the requested file from the server cache if the server cache contains that file. Otherwise, the server program calls the operating system to obtain the requested file and then adds that file to the server cache as a cached file. The server program then generates a result based on the requested file and transmits the result to the remote data processing system.
摘要翻译： 用于提供共享数据的服务器间缓存的系统和方法涉及服务器程序，该服务器程序在服务器机器的RAM中定义服务器高速缓存，并将选定的文件存储在服务器高速缓存中。 如果通过服务器机器的操作系统的文件系统界面修改缓存的文件，则操作系统会自动向服务器程序发出一个上调，标识修改后的文件。 响应于接收到上调，服务器程序从服务器缓存中删除修改的文件。 在一个实施例中，如果服务器高速缓存包含该文件，服务器程序通过从服务器高速缓存获得所请求的文件来响应需要访问所请求文件的客户端请求。 否则，服务器程序会调用操作系统来获取所请求的文件，然后将该文件作为缓存文件添加到服务器缓存中。 然后，服务器程序基于所请求的文件生成结果，并将结果发送到远程数据处理系统。
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公开(公告)号：US07499966B2
公开(公告)日：2009-03-03
申请号：US09935414
申请日：2001-08-23
IPC分类号： G06F15/13
CPC分类号： H04L67/42 , H04L29/06 , H04L67/02 , H04L67/34 , H04L69/16 , H04L69/161 , H04L69/326 , H04L69/329
摘要： A web server that integrates portions of operating system code to execute substantially within user space to reduce context switching. The web server includes an application level interpreter, such as an HTTP interpreter, configured to process client requests. The web server typically includes a network interface dedicated to process traffic to and from the web server. The web server may include within its user space kernel device driver extensions enabling it to communicate directly with the network interface. The server may implement a polling architecture in which the server periodically monitors the interface for new requests. The web server typically includes a user space transmission protocol library that enables the server to perform its own network processing of requests and responses. The library may include TCP/IP drivers that are optimized or streamlined for to processing HTTP requests.
摘要翻译： 集成了部分操作系统代码以在用户空间内实质执行以减少上下文切换的Web服务器。 Web服务器包括配置为处理客户端请求的应用程序级解释器，例如HTTP解释器。 Web服务器通常包括专用于处理到Web服务器和从web服务器的流量的网络接口。 网络服务器可以在其用户空间内包括内核设备驱动程序扩展，使其能够直接与网络接口进行通信。 服务器可以实现轮询架构，其中服务器周期性地监视接口的新请求。 Web服务器通常包括用户空间传输协议库，其使服务器能够执行其自己的请求和响应的网络处理。 该库可能包括针对处理HTTP请求进行了优化或精简的TCP / IP驱动程序。
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