公开(公告)号：US09552863B1

公开(公告)日：2017-01-24

申请号：US14872438

申请日：2015-10-01

Applicant: Everspin Technologies, Inc.

Inventor： Thomas Andre ,  Syed Alam ,  Chitra K. Subramanian ,  Dietmar Gogl

IPC: G11C11/00 ,  G11C11/16 ,  G11C13/00 ,  G11C11/14 ,  G11C11/15

CPC classification number: G11C11/1675 ,  G11C11/14 ,  G11C11/15 ,  G11C11/16 ,  G11C11/1677 ,  G11C13/0002 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0076 ,  G11C2013/0088

Abstract: A memory device is configured to identify a set of bit cells to be changed from a first state to a second state. In some examples, the memory device may apply a first voltage to the set of bit cells to change a least a first portion of the set of bit cells to the second state. In some cases, the memory device may also identify a second portion of the bit cells that remained in the first state following the application of the first voltage. In these cases, the memory device may apply a second voltage having a greater magnitude, duration, or both to the second portion of the set of bit cells in order to set the second portion of bit cells to the second state.

Abstract translation: 存储器设备被配置为识别要从第一状态改变到第二状态的位单元的集合。 在一些示例中，存储器件可以向该位单元集合施加第一电压以将位组中的至少第一部分改变为第二状态。 在一些情况下，存储器件还可以识别在应用第一电压之后保持在第一状态的位单元的第二部分。 在这些情况下，存储器件可以将具有更大幅度，持续时间或两者的第二电压施加到位单元集合的第二部分，以便将位单元的第二部分设置为第二状态。