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公开(公告)号：US10659124B2
公开(公告)日：2020-05-19
申请号：US16287767
申请日：2019-02-27
Applicant: FUJITSU LIMITED
Inventor： Takenori Ohshima , Yoji Ohashi , Hiroyoshi Ishikawa , Atsushi Honda , Toru Maniwa , Alexander Nikolaevich Lozhkin , Toshio Kawasaki , Yuichi Utsunomiya , Tomoya Ota
Abstract: A multiantenna communication device forms a directional beam by adding an antenna weight to respective signals of a plurality of antenna elements. The multiantenna communication device includes: a processor that executes performing distortion compensation on a transmission signal by using a distortion compensation coefficient; a plurality of power amplifiers that are provided corresponding to the antenna elements, and that amplify the transmission signal subjected to the distortion compensation by the processor; a multiplexer that multiplexes signals output from the power amplifiers to feed back; and an analog/digital (A/D) converter that A/D converts a multiplex feedback signal that is obtained by the multiplexer, wherein the processor executes updating the distortion compensation coefficient by using the multiplex feedback signal A/D converted by the A/D converter and the transmission signal.
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公开(公告)号：US09319012B2
公开(公告)日：2016-04-19
申请号：US14318817
申请日：2014-06-30
Applicant: FUJITSU LIMITED
Inventor： Toru Maniwa , Shigekazu Kimura , Nobuhisa Aoki
CPC classification number: H03F3/245 , H03F1/0288 , H03F1/56 , H03F3/19 , H03F2200/451 , H03F2203/21139
Abstract: An amplifying apparatus, including an amplitude-phase conversion unit to separate an input signal into first and second signals, wherein a phase difference between the first and second signals depends on an amplitude of the input signal, a first amplifying unit, a first matching circuit including a main line and a first harmonic processing circuit, wherein a length of the line of the first harmonic processing circuit short-circuits a harmonic, a second amplifying unit, a second matching circuit including a main line and a second harmonic processing circuit, wherein a length of the line of the second harmonic processing circuit short-circuits a harmonic, and an output synthesis unit to synthesize outputs from the first and second matching circuits, wherein a distance from the first amplifying unit to the first harmonic processing circuit differs from a distance from the second amplifying unit to the second harmonic processing circuit.
Abstract translation: 一种放大装置，包括用于将输入信号分离为第一和第二信号的幅度相位转换单元，其中第一和第二信号之间的相位差取决于输入信号的幅度，第一放大单元，第一匹配电路 包括主线路和一次谐波处理电路，其中所述一次谐波处理电路的线路的长度使谐波短路，第二放大单元，包括主线路和二次谐波处理电路的第二匹配电路，其中 所述二次谐波处理电路的线路的长度使谐波短路;以及输出合成单元，用于合成来自所述第一和第二匹配电路的输出，其中，从所述第一放大单元到所述第一谐波处理电路的距离不同于 从第二放大单元到第二谐波处理电路的距离。
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公开(公告)号：US08896372B2
公开(公告)日：2014-11-25
申请号：US13748719
申请日：2013-01-24
Applicant: Fujitsu Limited
Inventor： Toru Maniwa
CPC classification number: H03F3/68 , H03F1/0294 , H03F1/56 , H03F3/24 , H03F3/602 , H03F2200/423
Abstract: A first amplification section and a second amplification section included in an amplification apparatus amplify two constant amplitude signals generated by vector decomposition. An impedance inverting circuit inverts the impedance of the signal amplified by the second amplification section. A combining circuit corrects the phases of the signal amplified by the first amplification section and the signal whose impedance is inverted by the impedance inverting circuit, and combines and outputs these signals. The combining circuit includes a line which is (λ/4)+γ in length and which is an asymmetrical circuit element and a line which is (λ/4)−δ in length and which is an asymmetrical circuit element.
Abstract translation: 包括在放大装置中的第一放大部分和第二放大部分放大由矢量分解产生的两个恒定幅度信号。 阻抗反相电路反转由第二放大部分放大的信号的阻抗。 组合电路校正由第一放大部分放大的信号的相位和阻抗由阻抗反相电路反相的信号，并组合并输出这些信号。 组合电路包括长度为（λ/ 4）+γ的线，其为不对称电路元件，长度为（λ/ 4）-δ的线，是不对称电路元件。
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公开(公告)号：US09059664B2
公开(公告)日：2015-06-16
申请号：US13663963
申请日：2012-10-30
Applicant: FUJITSU LIMITED
Inventor： Toru Maniwa , Shigekazu Kimura
CPC classification number: H03F1/0294 , H03F1/32
Abstract: An amplifier includes a signal processing circuit configured to generate an orthogonal signal orthogonal to an input signal; a first D/A converter configured to convert the orthogonal signal into a first analog signal; a second D/A converter configured to convert the input signal into a second analog signal; and an analog computing circuit configured to generate a constant envelope signal based on the first analog signal from the first D/A converter and the second analog signal from the second D/A converter.
Abstract translation: 放大器包括：信号处理电路，被配置为产生与输入信号正交的正交信号; 第一D / A转换器，被配置为将所述正交信号转换为第一模拟信号; 配置为将输入信号转换为第二模拟信号的第二D / A转换器; 以及模拟计算电路，被配置为基于来自第一D / A转换器的第一模拟信号和来自第二D / A转换器的第二模拟信号产生恒定包络信号。
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公开(公告)号：US08594596B2
公开(公告)日：2013-11-26
申请号：US13659087
申请日：2012-10-24
Applicant: Fujitsu Limited
Inventor： Shigekazu Kimura , Toru Maniwa
CPC classification number: H03F1/0261 , H03F1/0288 , H03F1/56 , H03F3/189 , H03F3/245 , H03F2200/111 , H03F2200/222 , H03F2200/27 , H03F2200/387 , H03F2200/429
Abstract: An amplifier includes a first amplification element configured to amplify a first signal in one of first and second operation classes, a second amplification element configured to amplify a second signal in one of first and second operation classes, a first transmission line through which the amplified first signal is transferred, and a coupler configured to couple the transferred first signal and the amplified second signal, wherein the first amplification element amplifies the first signal in the first operation class and the second amplification element amplifies the second signal in the second operation class, when the first signal and the second signal have a first frequency band, and wherein the first amplification element amplifies the first signal in the second operation class and the second amplification element amplifies the second signal in the first operation class, when the first signal and the second signal have a second frequency band.
Abstract translation: 放大器包括：第一放大元件，被配置为放大第一和第二操作类别中的一个中的第一信号;第二放大元件，被配置为放大第一和第二操作类别中的一个中的第二信号;第一传输线， 信号被传送，并且耦合器被配置为耦合所传送的第一信号和放大的第二信号，其中第一放大元件放大第一操作类中的第一信号，而第二放大元件放大第二操作类中的第二信号，当 所述第一信号和所述第二信号具有第一频带，并且其中，当所述第一信号和所述第二信号具有第一频带时，所述第一放大单元放大所述第二运算类中的所述第一信号，并且所述第二放大单元放大所述第一运算类中的所述第二信号， 信号具有第二频带。
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Patent Agency Ranking
公开(公告)号：US11563464B2
公开(公告)日：2023-01-24
申请号：US17472739
申请日：2021-09-13
Applicant: FUJITSU LIMITED
Inventor： Tomoya Ota , Hiroyoshi Ishikawa , Toru Maniwa
IPC: H04B7/01 , H04B1/7107 , H04B1/04 , H04B7/0408
Abstract: A signal processing device includes: a first subarray that includes power amplifiers and phase shifters and that forms a first beam facing in a first direction; a second subarray that includes power amplifiers and phase shifters and that forms a second beam facing in a second direction; a feedback unit that feeds back at least signals that are output from the power amplifiers included in the first subarray; and a processor that is connected to the first subarray and the second subarray. The processor executes a process including: generating, based on a first feedback signal and a transmission signal output to the first subarray, a cancellation signal corresponding to an interference component applied to the second beam by the first beam; and adding the generated cancellation signal to a transmission signal output to the second subarray.
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公开(公告)号：US09270235B2
公开(公告)日：2016-02-23
申请号：US14080429
申请日：2013-11-14
Applicant: FUJITSU LIMITED
Inventor： Nobuhisa Aoki , Toru Maniwa
CPC classification number: H03F1/565 , H03F3/60 , H03F2200/387
Abstract: An amplifier includes: an amplifying device configured to amplify an input signal; and a matching circuit coupled to the amplifying device, and including an impedance transformer and a parallel resonance circuit coupled to a wiring which spans from the impedance transformer to the amplifying device, wherein a circuit length of the impedance transformer is longer than one-fourth of wavelength of an electronic wave having a frequency which is substantially equal to a resonance frequency of the parallel resonance circuit.
Abstract translation: 放大器包括：放大装置，被配置为放大输入信号; 以及耦合到所述放大装置的匹配电路，并且包括耦合到从所述阻抗变换器到所述放大装置的布线的阻抗变换器和并联谐振电路，其中所述阻抗变换器的电路长度长于所述阻抗变换器的电路长度的四分之一 具有基本上等于并联谐振电路的谐振频率的频率的电子波的波长。
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公开(公告)号：US08890620B2
公开(公告)日：2014-11-18
申请号：US13682394
申请日：2012-11-20
Applicant: Fujitsu Limited
Inventor： Ken Tamanoi , Toru Maniwa
IPC: H03F3/04
CPC classification number: H03F1/56 , H03F1/0266 , H03F1/0272 , H03F1/0294 , H03F3/21 , H03F3/601 , H03F2200/18 , H03F2200/222 , H03F2200/321 , H03F2200/387
Abstract: A power amplifier includes a first matching circuit configured to perform harmonic processing of an input signal, and a second matching circuit configured to perform the harmonic processing of an output signal, the output signal being generated by amplifying a power of the input signal. The power amplifier rotates a phase of output impedance at a matching point of the harmonic included in the generated output signal when the power of the input signal is decreased from a value higher than a certain value to a value lower than the certain value.
Abstract translation: 功率放大器包括被配置为执行输入信号的谐波处理的第一匹配电路和被配置为执行输出信号的谐波处理的第二匹配电路，所述输出信号通过放大输入信号的功率而产生。 当输入信号的功率从高于特定值的值减小到低于特定值的值时，功率放大器将包括在产生的输出信号中的谐波的匹配点处的输出阻抗的相位旋转。
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公开(公告)号：US20140055199A1
公开(公告)日：2014-02-27
申请号：US13911905
申请日：2013-06-06
Applicant: Fujitsu Limited
Inventor： Takeshi TAKANO , Masakazu Kojima , Michiharu Nakamura , Toru Maniwa , Shigekazu Kimura , Ken Tamanoi
IPC: H03F1/56
CPC classification number: H03F1/56 , H03F1/0205 , H03F3/189 , H03M1/802
Abstract: A power amplification device, includes: an amplifier to amplify an input signal; a switched capacitor, provided at an output stage of the amplifier, to change capacitance based on a first control signal; a matching unit, provided at the output stage of the amplifier and including a varactor pair in which two varactor diodes are coupled in series or a varactor pair in which two varactor diodes are coupled in parallel, to change capacitance based on a second control signal; a detection circuit to detect power of the input signal; a quantization circuit to quantize a detected power value, form a quantized bit string having a high-order bit group and a low-order bit group, and output the high-order bit group as the first control signal to the switched capacitor; and a conversion circuit to convert the low-order bit group into an analog value and form the second control signal.
Abstract translation: 一种功率放大装置，包括：放大器，用于放大输入信号; 设置在所述放大器的输出级的开关电容器，用于根据第一控制信号改变电容; 一个匹配单元，设置在放大器的输出级，并包括一个变容二极管对，其中两个变容二极管串联耦合，或一个变容二极管对，其中两个变容二极管并联耦合，以根据第二控制信号改变电容; 用于检测输入信号的功率的检测电路; 用于量化检测到的功率值的量化电路，形成具有高位位组和低位位组的量化比特串，并将高位比特组作为第一控制信号输出到切换电容器; 以及将低位比特组转换为模拟值并形成第二控制信号的转换电路。
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公开(公告)号：US20130147549A1
公开(公告)日：2013-06-13
申请号：US13663963
申请日：2012-10-30
Applicant: FUJITSU LIMITED
Inventor： Toru Maniwa , Shigekazu Kimura
IPC: H03F3/68
CPC classification number: H03F1/0294 , H03F1/32
Abstract: An amplifier includes a signal processing circuit configured to generate an orthogonal signal orthogonal to an input signal; a first D/A converter configured to convert the orthogonal signal into a first analog signal; a second D/A converter configured to convert the input signal into a second analog signal; and an analog computing circuit configured to generate a constant envelope signal based on the first analog signal from the first D/A converter and the second analog signal from the second D/A converter.
Abstract translation: 放大器包括：信号处理电路，被配置为产生与输入信号正交的正交信号; 第一D / A转换器，被配置为将所述正交信号转换为第一模拟信号; 配置为将输入信号转换为第二模拟信号的第二D / A转换器; 以及模拟计算电路，被配置为基于来自第一D / A转换器的第一模拟信号和来自第二D / A转换器的第二模拟信号产生恒定包络信号。
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