公开(公告)号：US09065462B1

公开(公告)日：2015-06-23

申请号：US14612920

申请日：2015-02-03

Applicant: FUJITSU SEMICONDUCTOR LIMITED

Inventor： Tomoya Kakamu

IPC: H03M1/06 ,  H03M1/70 ,  H03M1/00 ,  H03M1/66

CPC classification number: H03M1/66 ,  H03M1/00 ,  H03M1/1061 ,  H03M1/745

Abstract: A digital-to-analog conversion circuit includes first current sources weighted depending on lower-order bits of digital input signals and supplied with a first bias voltage and second current sources weighted depending on higher-order bits of the digital input signals and supplied with a second bias voltage. A reference current source circuit generates the first and second bias voltages based on a first reference current. An output circuit combines currents from the first and second current sources in accordance with the digital input signals to generate an output current, the currents from the first and second current sources being set according to the first reference current. A correction circuit changes the first reference current into a second reference current smaller than the first reference current, and adjusts the first and second bias voltages based on currents from the first and second current sources changed according to the second reference current.

Abstract translation: 数模转换电路包括根据数字输入信号的低位比特而加权的第一电流源，并提供第一偏置电压和根据数字输入信号的高阶位加权的第二电流源，并提供一个 第二偏置电压。 参考电流源电路基于第一参考电流产生第一和第二偏置电压。 输出电路根据数字输入信号组合来自第一和第二电流源的电流以产生输出电流，来自第一和第二电流源的电流根据第一参考电流被设定。 校正电路将第一参考电流改变成小于第一参考电流的第二参考电流，并且基于根据第二参考电流改变的来自第一和第二电流源的电流来调整第一和第二偏置电压。

公开(公告)号：US09054732B2

公开(公告)日：2015-06-09

申请号：US14249973

申请日：2014-04-10

Applicant: FUJITSU SEMICONDUCTOR LIMITED

Inventor： Tomoya Kakamu

IPC: H03M1/38 ,  H03M1/12 ,  H03M1/46 ,  H03M1/44

CPC classification number: H03M1/38 ,  H03M1/129 ,  H03M1/162 ,  H03M1/206 ,  H03M1/44 ,  H03M1/468

Abstract: An SAR analog-to-digital conversion circuit includes: first and second CDACs; first to third comparators respectively comparing outputs of the first and second CDACs, output levels of the first and third CDACs with a reference level; an arithmetic operation circuit; and an SAR control circuit, wherein the SAR control circuit: at each step, determines in which of four ranges output levels of the sampled and held signals of the first and second CDACs are included, the four ranges corresponding to the conversion range being quartered, determines two bits of the digital data and adjusts the output levels of the first and second CDACs so that a level at ¼ or ¾ of the voltage range agrees with the intermediate level, and controls first and second switches so that the voltage range is set to be a conversion range at a next step.

Abstract translation: SAR模数转换电路包括：第一和第二CDAC; 分别比较第一和第二CDAC的输出，第一和第三CDAC的输出电平与参考电平的第一至第三比较器; 算术运算电路; SAR控制电路，其中所述SAR控制电路：在每个步骤中确定在四个范围中的哪一个范围中包括所述第一和第二CDAC的采样和保持的信号的输出电平，与所述转换范围相对应的四个范围被分配， 确定数字数据的两位，并调整第一和第二CDAC的输出电平，使得电压范围的1/4或¾的电平与中间电平一致，并且控制第一和第二开关，使得电压范围被设置为 作为下一步的转换范围。