公开(公告)号：US07704757B2

公开(公告)日：2010-04-27

申请号：US10276509

申请日：2001-03-13

申请人： Francis Dell'Ova ,  Frank Lhermet ,  Dominique Poirot ,  Stephane Rayon ,  Bertrand Gomez ,  Nicole Lessoile ,  Pierre Rizzo

发明人： Francis Dell'Ova ,  Frank Lhermet ,  Dominique Poirot ,  Stephane Rayon ,  Bertrand Gomez ,  Nicole Lessoile ,  Pierre Rizzo

IPC分类号： H01L21/00 ,  G06F19/00

CPC分类号： H01L22/14 ,  H01L22/20 ,  H01L23/66 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method is provided for manufacturing an integrated electronic component arranged on a substrate wafer. According to the method, at least one metallization step is performed, and a value of an electrical parameter of the integrated electronic component is determined after the at least one metallization step. A subsequent metallization step is performed after determining the value of the electrical parameter. The subsequent metallization step is performed using an adjustment mask chosen from n predefined masks based on a desired value of the electrical parameter, so as to obtain the desired value of the electrical parameter of the integrated electronic component after manufacturing. In one preferred embodiment, a series of electrical tests is performed on the wafer using test equipment, and the value of the electrical parameter is determined using the same test equipment as is used to perform the series of electrical tests.

摘要翻译： 提供一种用于制造布置在基板晶片上的集成电子部件的方法。 根据该方法，执行至少一个金属化步骤，并且在至少一个金属化步骤之后确定集成电子部件的电参数的值。 在确定电参数的值之后执行随后的金属化步骤。 随后的金属化步骤使用基于电参数的期望值从n个预定义掩模中选择的调整掩模来执行，以便在制造之后获得集成电子部件的电参数的期望值。 在一个优选实施例中，使用测试设备对晶片进行一系列电测试，并且使用与用于执行一系列电测试的相同的测试设备来确定电参数的值。

公开(公告)号：US07215723B2

公开(公告)日：2007-05-08

申请号：US10239291

申请日：2001-03-20

申请人： Pierre Rizzo ,  Francis Dell'Ova

发明人： Pierre Rizzo ,  Francis Dell'Ova

IPC分类号： H04L27/00

CPC分类号： G06K19/0701 ,  G06K7/0008 ,  G06K19/0723 ,  H03D1/10 ,  H03K5/082 ,  H04L25/061

摘要： The invention concerns a demodulator of an amplitude-modulated signal (Vdb), characterised in that it comprises a peak detecting cell (DCR) capable of extracting the reference modulating signal (Vpeak1) of the modulated signal (Vdb); a first demodulator (FE) adapted to detect the peak of the reference modulating signal (Vpeak1) to generate a high comparison threshold and locate the start of the modulation, a second demodulator (RE) adapted to detect a trough of the reference modulating signal (Vpeak1) to generate a low comparison threshold and locate the end of the modulation; a logic processing unit capable of supplying the demodulated signal (Vdemod).

摘要翻译： 本发明涉及一种幅度调制信号（Vdb）的解调器，其特征在于它包括能够提取调制信号（Vdb）的参考调制信号（Vpeak 1）的峰值检测单元（DCR）; 适于检测参考调制信号（Vpeak 1）的峰值以产生高比较阈值并定位调制开始的第一解调器（FE），适于检测参考调制信号的谷值的第二解调器（RE） （Vpeak 1）产生低比较阈值并定位调制结束; 能够提供解调信号（Vdemod）的逻辑处理单元。

公开(公告)号：US07975921B2

公开(公告)日：2011-07-12

申请号：US12103570

申请日：2008-04-15

申请人： Christophe Mani ,  Francis Dell'Ova ,  Pierre Rizzo

发明人： Christophe Mani ,  Francis Dell'Ova ,  Pierre Rizzo

IPC分类号： G06K7/06

CPC分类号： H04B5/0056 ,  G06K7/0008 ,  G06K19/0723

摘要： An inductive coupling reader includes a passive interface circuit for modulating the impedance of an antenna circuit and extracting from the antenna circuit a data signal and a RF clock signal, and circuitry for coupling the reader to a removable security module. The reader includes an emulation circuit for opening a RF transmission channel with another reader, a non-removable electrical link linking the emulation circuit to the passive interface circuit, by which the data signal and the RF clock signal are supplied to the emulation circuit, and a data bus clocked by a bus clock signal having a frequency inferior to the frequency of the RF clock signal, for linking the emulation circuit to the removable security module. The reader has low electrical consumption.

摘要翻译： 电感耦合读取器包括用于调制天线电路的阻抗并从天线电路提取数据信号和RF时钟信号的无源接口电路，以及用于将读取器耦合到可拆卸安全模块的电路。 读取器包括用于与另一个读取器打开RF传输通道的仿真电路，将仿真电路连接到无源接口电路的不可拆卸电气连接，通过该无源接口电路将数据信号和RF时钟信号提供给仿真电路，以及 由总线时钟信号计时的数据总线，其频率低于RF时钟信号的频率，用于将仿真电路链接到可移除的安全模块。 读卡器电耗低。

公开(公告)号：US20090101716A1

公开(公告)日：2009-04-23

申请号：US12103570

申请日：2008-04-15

申请人： Christophe Mani ,  Francis Dell'Ova ,  Pierre Rizzo

发明人： Christophe Mani ,  Francis Dell'Ova ,  Pierre Rizzo

IPC分类号： G06K7/06

CPC分类号： H04B5/0056 ,  G06K7/0008 ,  G06K19/0723

摘要： An inductive coupling reader includes a passive interface circuit for modulating the impedance of an antenna circuit and extracting from the antenna circuit a data signal and a RF clock signal, and circuitry for coupling the reader to a removable security module. The reader includes an emulation circuit for opening a RF transmission channel with another reader, a non-removable electrical link linking the emulation circuit to the passive interface circuit, by which the data signal and the RF clock signal are supplied to the emulation circuit, and a data bus clocked by a bus clock signal having a frequency inferior to the frequency of the RF clock signal, for linking the emulation circuit to the removable security module. The reader has low electrical consumption.

摘要翻译： 电感耦合读取器包括用于调制天线电路的阻抗并从天线电路提取数据信号和RF时钟信号的无源接口电路，以及用于将读取器耦合到可拆卸安全模块的电路。 读取器包括用于与另一个读取器打开RF传输通道的仿真电路，将仿真电路连接到无源接口电路的不可拆卸电气连接，通过该无源接口电路将数据信号和RF时钟信号提供给仿真电路，以及 由总线时钟信号计时的数据总线，其频率低于RF时钟信号的频率，用于将仿真电路链接到可移除的安全模块。 读卡器电耗低。

公开(公告)号：US08410910B2

公开(公告)日：2013-04-02

申请号：US12043691

申请日：2008-03-06

申请人： David Naura ,  Christophe Moreaux ,  Ahmed Kari ,  Pierre Rizzo

发明人： David Naura ,  Christophe Moreaux ,  Ahmed Kari ,  Pierre Rizzo

IPC分类号： H04Q5/22

CPC分类号： G06K19/0723 ,  G06K19/0713 ,  G11C5/142 ,  G11C16/10 ,  G11C16/30

摘要： A passive contactless integrated circuit includes an electrically programmable non-volatile data memory (MEM), a charge accumulation booster circuit for supplying a high voltage necessary for writing data in the memory. The integrated circuit includes a volatile memory point for memorizing an indicator flag, and circuitry for modifying the value of the indicator flag when the high voltage reaches a critical threshold for the first time after activating the booster circuit.

摘要翻译： 无源非接触集成电路包括电可编程非易失性数据存储器（MEM），电荷累积升压电路，用于提供将数据写入存储器所需的高电压。 集成电路包括用于存储指示符标志的易失性存储点，以及用于在激活升压电路之后第一次高电压达到临界阈值时修改指示符标志值的电路。

公开(公告)号：US08028149B2

公开(公告)日：2011-09-27

申请号：US11132161

申请日：2005-05-18

申请人： Christophe Moreaux ,  Pierre Rizzo

发明人： Christophe Moreaux ,  Pierre Rizzo

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  H04Q5/22

CPC分类号： G06K7/0008

摘要： A method of reading a group of memory words from an integrated circuit memory of a contactless tag, comprising the sending by a remote interrogation unit to the contactless tag of a specific command for reading the group of memory words from a given start address, the initialization of an address counter for the contactless tag to the value of the given start address, and the sending by the contactless tag of the memory word at the start address, as well as an iterative process comprising in succession a first step of sending by the remote interrogation unit to the contactless tag of an incrementation marker recognizable by the contactless tag, a second step of incrementation of the address counter for the contactless tag in response to the incrementation marker, and a third step of sending by the contactless tag to the remote interrogation unit of a data frame comprising the memory word stored in the memory at the address pointed at by the current value of the address counter.

摘要翻译： 一种从非接触式标签的集成电路存储器读取一组存储器字的方法，包括由远程询问单元向非接触标签发送用于从给定起始地址读取存储器字组的特定命令，该初始化 用于非接触式标签的地址计数器与给定开始地址的值，以及由起始地址处的存储器字的非接触式标签的发送，以及包括连续发送的第一步骤的迭代过程 询问单元到由非接触式标签识别的递增标记的非接触式标签，响应于增量标记增加非接触式标签的地址计数器的第二步骤，以及第三步骤，通过非接触式标签发送到远程询问 数据帧的单位包括存储在存储器中的地址计数器的当前值指向的地址处的存储器字。

公开(公告)号：US07602878B2

公开(公告)日：2009-10-13

申请号：US12141798

申请日：2008-06-18

申请人： Christophe Moreaux ,  Ahmed Kari ,  David Naura ,  Pierre Rizzo

发明人： Christophe Moreaux ,  Ahmed Kari ,  David Naura ,  Pierre Rizzo

IPC分类号： H03K21/00

CPC分类号： H03K23/66

摘要： A binary frequency divider includes a counter paced by an input signal, means for comparing a counting value with first and second threshold values and supplying first and second control signals synchronized with variation edges of a first type of the input signal. The divider includes means for supplying at least one third control signal shifted by a half-period of the input signal in relation to one of the first or second control signals, and control means for generating the output signal using control signals chosen according to the value of at least one least significant bit of the division setpoint. Application is mainly but not exclusively to UHF transponders.

摘要翻译： 二进制分频器包括由输入信号起搏的计数器，用于将计数值与第一和第二阈值进行比较并提供与第一类型的输入信号的变化沿同步的第一和第二控制信号的装置。 分频器包括用于提供相对于第一或第二控制信号之一移位了输入信号的半周期的至少一个第三控制信号的装置，以及使用根据该值选择的控制信号产生输出信号的控制装置 的分区设定点的至少一个最低有效位。 应用主要但不仅限于UHF应答器。

公开(公告)号：US07472834B2

公开(公告)日：2009-01-06

申请号：US10886934

申请日：2004-07-08

申请人： Jérôme Conraux ,  Pierre Rizzo

发明人： Jérôme Conraux ,  Pierre Rizzo

IPC分类号： G06K19/06

CPC分类号： G06K19/07769 ,  G06K7/0008 ,  G06K19/0723

摘要： A dual-mode smart card comprising several pads of physical contact with an external reader and two pads of connection to an antenna for a contactless operation, and comprising a voltage regulator capable of extracting from a radio frequency excitation reaching the antenna, a supply voltage of the chip's processing circuits, this regulator being controllable by a central circuit to be deactivated in the presence of a supply voltage on contacts of the chip.

摘要翻译： 一种双模智能卡，包括与外部读取器物理接触的多个焊盘和用于非接触操作的两个与天线的连接焊盘，并且包括能够从到达天线的射频激励提取的电压调节器， 芯片的处理电路，该调节器可由中央电路控制，以便在芯片的触点上存在电源电压时被去激活。

公开(公告)号：US07436702B2

公开(公告)日：2008-10-14

申请号：US11469351

申请日：2006-08-31

申请人： David Naura ,  Christophe Moreaux ,  Ahmed Kari ,  Pierre Rizzo

发明人： David Naura ,  Christophe Moreaux ,  Ahmed Kari ,  Pierre Rizzo

IPC分类号： G11C11/34

CPC分类号： G11C16/22

摘要： A method protects against a global data erasure an integrated circuit comprising an electrically programmable data memory and a control unit to execute commands for reading or writing in the memory. The method includes the steps of providing, in the integrated circuit, electrically programmable reference memory cells, at putting the integrated circuit into service, storing, in the reference memory cells, bits of determined value forming an authorized combination of bits and, during the operation of the integrated circuit following its putting into service, reading and evaluating the reference memory cells and blocking the integrated circuit if the reference memory cells contain a forbidden combination of bits different from the authorized combination.

摘要翻译： 一种防止全局数据擦除的集成电路的方法，该集成电路包括电可编程数据存储器和控制单元，以执行用于读取或写入存储器的命令。 该方法包括以下步骤：在集成电路中提供电可编程参考存储器单元，在将集成电路投入使用时，在参考存储器单元中存储形成授权的位组合的确定值的位，并且在操作期间 如果参考存储器单元包含与授权组合不同的位的禁止组合，则集成电路在其投入使用之后，读取和评估参考存储器单元并阻塞集成电路。

公开(公告)号：US20070153581A1

公开(公告)日：2007-07-05

申请号：US11610628

申请日：2006-12-14

申请人： Ahmed Kari ,  Christophe Moreaux ,  David Naura ,  Pierre Rizzo

发明人： Ahmed Kari ,  Christophe Moreaux ,  David Naura ,  Pierre Rizzo

IPC分类号： G11C11/34

CPC分类号： G11C16/349

摘要： A method for executing a write command for writing a binary word in a programmable memory, comprises writing each of the bits in a programmed state of a binary word to be written in a corresponding memory cell of the memory, reading each bit of the word written in the memory corresponding to a bit in the programmed state of the word to be written, comparing each bit in the programmed state of the word to be written with a corresponding bit read in the memory, and generating an error signal if at least one bit of the word to be written in the programmed state is different from the corresponding bit read. Application of the method can be particularly but not exclusively to integrated circuits for chip cards.

摘要翻译： 一种用于执行用于在可编程存储器中写入二进制字的写入命令的方法，包括将要写入存储器的相应存储器单元的二进制字的编程状态中的每一位写入，读取写入的字的每个位 在对应于要写入的字的编程状态中的位的存储器中，将要写入的字的编程状态中的每个比特与在存储器中读取的相应位进行比较，并且如果至少一个位 要写入编程状态的字与相应的位读取不同。 该方法的应用可以特别地但不排他地用于芯片卡的集成电路。