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公开(公告)号：US20150285858A1
公开(公告)日：2015-10-08
申请号：US14243386
申请日：2014-04-02
Applicant: Freescale Semiconductor, Inc.
Inventor： William E. Edwards , John M. Hall
IPC: G01R31/28
CPC classification number: G01R31/31713 , G01R31/31701 , G06F1/00 , H04L1/00 , H04L2201/00
Abstract: An integrated circuit haying normal and special operating modes includes a mode entry interlock (201) which is enabled by an initialization command and an externally supplied voltage at a first I/O terminal (204) to detect a conflict at the I/O terminal for reducing the likelihood of inadvertent entry into the special operating mode. The mode entry interlock also includes a second I/O terminal (212) for receiving a disassociated software command to enter into the special operating mode, and mode control logic (210, 216) for evaluating the received software command against any detected conflict at the I/O terminal to generate a special operating mode enable signal in response to receiving the first and second input signals only when the detected logic state conflicts with the first logic state.
Abstract translation: 具有正常和特殊操作模式的集成电路包括模式输入互锁（201），其通过初始化命令和外部提供的电压在第一I / O端子（204）使能以检测I / O端口上的冲突， 减少无意中进入特殊操作模式的可能性。 模式输入互锁还包括用于接收解除关联的软件命令以进入特殊操作模式的第二I / O终端（212）和模式控制逻辑（210,216），用于根据所接收的软件命令 I / O端子仅在检测到的逻辑状态与第一逻辑状态冲突时响应于接收第一和第二输入信号而产生特殊的工作模式使能信号。
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公开(公告)号：US09506979B2
公开(公告)日：2016-11-29
申请号：US14243386
申请日：2014-04-02
Applicant: Freescale Semiconductor, Inc.
Inventor： William E. Edwards , John M. Hall
IPC: G01R31/26 , G01R31/317 , H04L1/00 , G06F1/00
CPC classification number: G01R31/31713 , G01R31/31701 , G06F1/00 , H04L1/00 , H04L2201/00
Abstract: An integrated circuit having normal and special operating modes includes a mode entry interlock (201) which is enabled by an initialization command and an externally supplied voltage at a first I/O terminal (204) to detect a conflict at the I/O terminal for reducing the likelihood of inadvertent entry into the special operating mode. The mode entry interlock also includes a second I/O terminal (212) for receiving a disassociated software command to enter into the special operating mode, and mode control logic (210, 216) for evaluating the received software command against any detected conflict at the I/O terminal to generate a special operating mode enable signal in response to receiving the first and second input signals only when the detected logic state conflicts with the first logic state.
Abstract translation: 具有正常和特殊操作模式的集成电路包括：模式输入互锁（201），其通过初始化命令和第一I / O端子（204）处的外部提供的电压使能，以检测I / O端口处的冲突 减少无意中进入特殊操作模式的可能性。 模式输入互锁还包括用于接收解除关联的软件命令以进入特殊操作模式的第二I / O终端（212）和模式控制逻辑（210,216），用于根据所接收的软件命令 I / O端子仅在检测到的逻辑状态与第一逻辑状态冲突时响应于接收第一和第二输入信号而产生特殊的工作模式使能信号。
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公开(公告)号：US09285244B2
公开(公告)日：2016-03-15
申请号：US14723420
申请日：2015-05-27
Applicant: FREESCALE SEMICONDUCTOR, INC.
Inventor： John M. Pigott , Fred T. Brauchler , William E. Edwards , Mike R. Garrard , Randall C. Gray , John M. Hall
CPC classification number: G01D5/2013 , G01D5/24476 , G01P3/488 , G01P3/489
Abstract: An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described.
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