公开(公告)号：US09336144B2

公开(公告)日：2016-05-10

申请号：US13950538

申请日：2013-07-25

Applicant: GLOBALFOUNDRIES INC.

Inventor： Alper Buyuktosunoglu ,  Philip G. Emma ,  Allan M. Hartstein ,  Michael B. Healy ,  Krishnan K. Kailas

IPC: G06F12/08

CPC classification number: G06F12/0811 ,  G06F12/0813 ,  G06F12/0893 ,  G06F2212/601 ,  Y02D10/13

Abstract: Three-dimensional processing systems are provided which have multiple layers of conjoined chips, wherein one or more chip layers include processor cores that share cache hierarchies over multiple chip layers. The caches can be partitioned, conjoined, and managed according to various sets of rules and configurations.

Abstract translation: 提供具有多层联结芯片的三维处理系统，其中一个或多个芯片层包括在多个芯片层上共享高速缓存层次的处理器核心。 高速缓存可以根据各种规则和配置进行分区，联合和管理。

公开(公告)号：US09423865B2

公开(公告)日：2016-08-23

申请号：US14026444

申请日：2013-09-13

Applicant: GLOBALFOUNDRIES INC.

Inventor： Pradip Bose ,  Alper Buyuktosunoglu ,  Hans Jacobson ,  Victor Zyuban

IPC: G06F1/26 ,  G06F1/32

CPC classification number: G06F1/3287 ,  G06F1/26 ,  Y02D10/171

Abstract: A mechanism is provided for an integrated circuit with power gating. A power switch is configured to connect and disconnect circuits to a common voltage source. A capacitor tank is configured to supply wakeup charge to a given circuit. A controllable element is connected to the given circuit and to the capacitor tank. The controllable element is configured to controllably connect and disconnect the capacitor tank to the given circuit in order to supply the wakeup charge to the given circuit. The controllable element is configured to, responsive to the power switch disconnecting the given circuit from the common voltage source and to the given circuit being turned on to wakeup, supply the wakeup charge to the given circuit being turned on by transferring the wakeup charge from the capacitor tank to the given circuit. This reduces the electrical charge transferred from the circuits connected to the common voltage source.

Abstract translation: 为具有电源门控的集成电路提供了一种机制。 电源开关被配置为连接和断开电路到公共电压源。 电容器箱被配置为向给定的电路提供唤醒电荷。 可控元件连接到给定电路和电容器箱。 可控元件被配置为将电容器罐可控地连接和断开到给定电路，以便将唤醒电荷提供给给定电路。 可控元件被配置为响应于电源开关断开给定电路与公共电压源和给定电路被接通以唤醒，将唤醒电荷提供给给定的电路，该电路通过将唤醒电荷从 电容器槽给定电路。 这减少了从连接到公共电压源的电路传送的电荷。

公开(公告)号：US09257152B2

公开(公告)日：2016-02-09

申请号：US13673262

申请日：2012-11-09

Applicant: GLOBALFOUNDRIES INC.

Inventor： Alper Buyuktosunoglu ,  Philip G. Emma ,  Allan M. Hartstein ,  Michael B. Healy ,  Krishnan K. Kailas

IPC: G11C5/02 ,  G11C5/06 ,  H01L27/06

CPC classification number: G11C5/063 ,  G11C5/025 ,  H01L27/0688

Abstract: Multi-dimensional memory architectures are provided having access wiring structures that enable different access patterns in multiple dimensions. Furthermore, three-dimensional multiprocessor systems are provided having multi-dimensional cache memory architectures with access wiring structures that enable different access patterns in multiple dimensions.