Fin-type metal-semiconductor resistors and fabrication methods thereof
    1.
    发明授权
    Fin-type metal-semiconductor resistors and fabrication methods thereof 有权
    鳍型金属半导体电阻及其制造方法

    公开(公告)号:US09595518B1

    公开(公告)日:2017-03-14

    申请号:US14969449

    申请日:2015-12-15

    Abstract: Fabrication methods and structure include: providing a wafer with at least one fin extended above a substrate in a first region, and at least one fin extended above the substrate in a second region of the wafer; forming a gate structure extending at least partially over the at least one fin to define a semiconductor device region in the first region; implanting a dopant into the at least one fin in the first region and into the at least one fin in the second region of the wafer, where the implanting of the dopant into the at least one fin of the second region modulates a physical property of the at least one fin to define a resistor device region in the second region; and disposing a conductive material at least partially over the at least one fin in the first region and over the at least one fin in the second region of the wafer, in part, to form a source and drain contact in the first region, and a fin-type metal-semiconductor resistor in the second region.

    Abstract translation: 制造方法和结构包括:提供具有在第一区域中的衬底上延伸的至少一个翅片的晶片和在晶片的第二区域中在衬底上方延伸的至少一个鳍; 形成至少部分地在所述至少一个翅片上延伸的栅极结构,以在所述第一区域中限定半导体器件区域; 将掺杂剂注入所述第一区域中的所述至少一个翅片并且进入所述晶片的所述第二区域中的所述至少一个翅片,其中所述掺杂剂注入到所述第二区域的所述至少一个翅片中调制所述第二区域的物理性质 至少一个翅片以限定所述第二区域中的电阻器件区域; 以及至少部分地在所述第一区域中的所述至少一个翅片上并且在所述晶片的所述第二区域中的所述至少一个翅片之上至少部分地布置导电材料,以部分地在所述第一区域中形成源极和漏极接触,以及 鳍式金属半导体电阻器。

    Merged source drain epitaxy
    2.
    发明授权
    Merged source drain epitaxy 有权
    合并源漏外延

    公开(公告)号:US09437496B1

    公开(公告)日:2016-09-06

    申请号:US14727219

    申请日:2015-06-01

    CPC classification number: H01L29/66795 H01L29/66545

    Abstract: A semiconductor device such as a FinFET includes a plurality of fins formed upon a substrate and a gate covering a portion of the fins. Diamond-shaped volumes are formed on the sidewalls of the fins by epitaxial growth which may be limited to avoid merging of the volumes or where the epitaxy volumes have merged. Because of the difficulties in managing merging of the diamond-shaped volumes, a controlled merger of the diamond-shaped volumes includes depositing an amorphous semiconductor material upon the diamond-shaped volumes and a crystallization process to crystallize the deposited semiconductor material on the diamond-shaped volumes to fabricate controllable and uniformly merged source drain.

    Abstract translation: 诸如FinFET的半导体器件包括形成在衬底上的多个鳍片和覆盖鳍片的一部分的栅极。 通过外延生长在翅片的侧壁上形成菱形体积,其可以被限制以避免体积的合并或外延体积合并的位置。 由于难以管理菱形体积的合并,钻石形容积的受控合并包括在金刚石体积上沉积非晶半导体材料和结晶过程以将沉积的半导体材料结晶在菱形体上 体积来制造可控和均匀合并的源极漏极。

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