公开(公告)号：US20150228555A1

公开(公告)日：2015-08-13

申请号：US14176178

申请日：2014-02-10

Applicant: GLOBALFOUNDRIES INC.

Inventor： Mohamed A. RABIE ,  Premachandran CHIRAYARIKATHUVEEDU ,  Mahadeva Iyer NATARAJAN

IPC: H01L23/48 ,  H01L21/321 ,  H01L21/324 ,  H01L21/768 ,  H01L23/00

CPC classification number: H01L23/481 ,  H01L21/3081 ,  H01L21/3212 ,  H01L21/324 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76898 ,  H01L23/3157 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Structures and methods of fabrication are provided with reduced or cancelled stress within the substrate of the structure adjacent to a through-substrate via. The fabrication method(s) includes: forming a structure with a through-substrate via (TSV) having a reduced device keep-out zone (KOZ) adjacent to the through-substrate via, the forming including: providing the through-substrate via within a substrate of the structure; and providing a stress-offset layer above the substrate selected and configured to provide a desired offset stress to reduce stress within the substrate caused by the presence of the through-substrate via within the substrate. In one embodiment, the stress-offset layer provides a desired compressive stress sufficient to reduce or eliminate tensile stress within the substrate due to the presence of the through-substrate via within the substrate.

Abstract translation: 提供了结构和制造方法，其在邻近通过基板通孔的结构的衬底内具有减小或消除的应力。 制造方法包括：通过具有与贯穿基板通孔相邻的减小的器件保持区（KOZ）的通孔（TSV）形成结构，所述形成包括：通过内部提供贯穿衬底 该结构的基底; 以及在所述衬底之上提供应力偏移层，所述应力偏移层被选择并且被配置为提供期望的偏移应力，以减少由所述衬底内存在所述衬底所引起的衬底内的应力。 在一个实施例中，应力偏移层提供足以减少或消除基板内的拉应力的期望的压缩应力，这是由于在基板内存在贯穿基板。

公开(公告)号：US20170033061A1

公开(公告)日：2017-02-02

申请号：US14812340

申请日：2015-07-29

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Mohamed RABIE ,  Premachandran CHIRAYARIKATHUVEEDU

IPC: H01L23/64 ,  H01L23/528 ,  H01L21/768 ,  H01L21/3205 ,  H01L23/58 ,  H01L23/48

CPC classification number: H01L23/528 ,  H01L21/32055 ,  H01L21/76877 ,  H01L23/481 ,  H01L23/585 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06565

Abstract: Methods for creating effective noise reducing structures in an IC device to significantly reduce TSV-induced noise in an IC substrate of the IC device and the resulting device are disclosed. Embodiments include providing a plurality of circuits on an upper surface of an IC substrate; providing an active TSV in proximity to the circuits, wherein the TSV extends through the IC substrate; forming a noise reducing structure connected to a perimeter of a vertical segment of the active TSV; and connecting the noise reducing structure to an electrical ground node in common with the circuits.

Abstract translation: 公开了一种用于在IC器件中产生有效的降噪结构以显着降低IC器件的IC衬底和所得器件中的TSV感应噪声的方法。 实施例包括在IC基板的上表面上设置多个电路; 在所述电路附近提供有源TSV，其中所述TSV延伸穿过所述IC基板; 形成连接到有源TSV的垂直段的周边的降噪结构; 并将降噪结构连接到与电路共同的电接地节点。