公开(公告)号：US20150357285A1

公开(公告)日：2015-12-10

申请号：US14799116

申请日：2015-07-14

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Huy CAO ,  Songkram SRIVATHANAKUL ,  Huang LIU ,  Garo Jacques DERDERIAN ,  Boaz ALPERSON

IPC: H01L23/532 ,  H01L21/768

CPC classification number: H01L23/5329 ,  H01L21/02126 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/31105 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/76831 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Conductive contact structure of a circuit structures and methods of fabrication thereof are provided. The fabrication includes, for instance, providing at least one contact opening disposed over a semiconductor substrate; forming a carbon-rich contact liner material having a set carbon content conformally within the at least one contact opening disposed over the semiconductor substrate.

Abstract translation: 提供电路结构的导电接触结构及其制造方法。 该制造包括例如提供设置在半导体衬底上的至少一个接触开口; 在所述半导体衬底上设置的所述至少一个接触开口中形成具有固定碳含量的富碳接触衬垫材料。

公开(公告)号：US20170133325A1

公开(公告)日：2017-05-11

申请号：US14933650

申请日：2015-11-05

Applicant: GLOBALFOUNDRIES INC.

Inventor： Moosung M. CHAE ,  Ki Young LEE ,  Songkram SRIVATHANAKUL

IPC: H01L23/532 ,  H01L23/522 ,  H01L23/528 ,  H01L21/768

CPC classification number: H01L21/76858 ,  H01L21/76867 ,  H01L21/76879 ,  H01L23/5226 ,  H01L23/53209

Abstract: A method of forming a self-forming barrier includes selectively removing a portion of a semiconductor dielectric layer to form a three-dimensional pattern within a remaining portion of the dielectric layer. A metal liner layer is disposed on a surface of the pattern to provide a metal lined pattern. A metal filling is disposed over the metal lined pattern, the metal filling being at least partially composed of a metal used in the metal liner layer. Diffusion ions are disposed in one of the metal filling and the metal liner layer. Heat is applied to the metal filling and metal liner layer to diffuse the diffusion ions from one of the metal filling and the metal liner layer into the dielectric layer to form a barrier layer between the metal liner layer and the dielectric layer.

公开(公告)号：US20150084131A1

公开(公告)日：2015-03-26

申请号：US14032740

申请日：2013-09-20

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Tsung-Liang CHEN ,  Hung-Wei LIU ,  Rohit PAL ,  Hsin-Neng TAI ,  Huey-Ming WANG ,  Tae Hoon LEE ,  Songkram SRIVATHANAKUL ,  Danni CHEN

IPC: H01L21/8238 ,  H01L27/092

CPC classification number: H01L29/42364 ,  H01L21/823828 ,  H01L21/823857 ,  H01L21/823864 ,  H01L27/092

Abstract: Methods of facilitating gate height uniformity by controlling recessing of dielectric material and semiconductor devices formed from the methods are provided. The methods include, for instance, forming a transistor of the semiconductor device with an n-type transistor and a p-type transistor, the n-type transistor and the p-type transistor including plurality of sacrificial gate structures and protective masks at upper surfaces of the plurality of sacrificial gate structures; providing a dielectric material over and between the plurality of sacrificial gate structures; partially densifying the dielectric material to form a partially densified dielectric material; further densifying the partially densified dielectric material to create a modified dielectric material; and creating substantially planar surface on the modified dielectric material, to control dielectric material recess and gate height.

公开(公告)号：US20150270364A1

公开(公告)日：2015-09-24

申请号：US14730887

申请日：2015-06-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Tsung-Liang CHEN ,  Hung-Wei LIU ,  Rohit PAL ,  Hsin-Neng TAI ,  Huey-Ming WANG ,  Tae Hoon LEE ,  Songkram SRIVATHANAKUL ,  Danni CHEN

IPC: H01L29/423 ,  H01L27/092

CPC classification number: H01L29/42364 ,  H01L21/823828 ,  H01L21/823857 ,  H01L21/823864 ,  H01L27/092

Abstract: Methods of facilitating gate height uniformity by controlling recessing of dielectric material and semiconductor devices formed from the methods are provided. The methods include, for instance, forming a transistor of the semiconductor device with an n-type transistor and a p-type transistor, the n-type transistor and the p-type transistor including plurality of sacrificial gate structures and protective masks at upper surfaces of the plurality of sacrificial gate structures; providing a dielectric material over and between the plurality of sacrificial gate structures; partially densifying the dielectric material to form a partially densified dielectric material; further densifying the partially densified dielectric material to create a modified dielectric material; and creating substantially planar surface on the modified dielectric material, to control dielectric material recess and gate height.

Abstract translation: 提供了通过控制由这些方法形成的介电材料和半导体器件的凹陷来促进栅极高度均匀性的方法。 所述方法包括例如用n型晶体管和p型晶体管形成半导体器件的晶体管，n型晶体管和p型晶体管包括多个牺牲栅极结构和在上表面处的保护掩模 的多个牺牲栅极结构; 在多个牺牲栅极结构之上和之间提供电介质材料; 部分致密化介电材料以形成部分致密化的电介质材料; 进一步致密化部分致密化的介电材料以产生改性的介电材料; 以及在改性介电材料上形成基本平坦的表面，以控制电介质材料凹陷和栅极高度。

公开(公告)号：US20150194342A1

公开(公告)日：2015-07-09

申请号：US14150260

申请日：2014-01-08

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Huy CAO ,  Songkram SRIVATHANAKUL ,  Huang LIU ,  Garo Jacques DERDERIAN ,  Boaz ALPERSON

IPC: H01L21/768 ,  H01L23/482

CPC classification number: H01L23/5329 ,  H01L21/02126 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/31105 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/76831 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Conductive contact structure of a circuit structures and methods of fabrication thereof are provided. The fabrication includes, for instance, providing at least one contact opening disposed over a semiconductor substrate; forming a carbon-rich contact liner material including a carbon-containing species and an elemental carbon disposed therein, the carbon-containing species and the elemental carbon together defining a set carbon content within the carbon-rich contact liner material; and depositing the carbon-rich contact liner material conformally within the at least one contact opening disposed over the semiconductor substrate.

Abstract translation: 提供电路结构的导电接触结构及其制造方法。 该制造包括例如提供设置在半导体衬底上的至少一个接触开口; 形成包含含碳物质和设置在其中的元素碳的富碳接触衬垫材料，所述含碳物质和所述元素碳一起限定所述富碳接触衬里材料内的固定碳含量; 以及将所述富碳接触衬垫材料共形地沉积在设置在所述半导体衬底上的所述至少一个接触开口内。