公开(公告)号：US20160233091A1

公开(公告)日：2016-08-11

申请号：US14616226

申请日：2015-02-06

Applicant: GLOBALFOUNDRIES Inc. ,  INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hui ZANG ,  Balasubramanian PRANATHARTHIHARAN

IPC: H01L21/283 ,  H01L29/78 ,  H01L21/28

CPC classification number: H01L21/76897 ,  H01L29/66545

Abstract: Semiconductor devices and methods for forming the devices with middle of line capacitance reduction in self-aligned contact process flow are provided. One method includes, for instance: obtaining a wafer with at least one source, at least one drain, and at least one sacrificial gate; forming a first contact region over the at least one source and a second contact region over the at least one drain; removing the at least one sacrificial gate; forming at least one gate; and forming at least one small contact over the first contact region and the second contact region. An intermediate semiconductor device is also disclosed.

Abstract translation: 提供了用于形成具有自对准接触工艺流程中线路电容减小的器件的半导体器件和方法。 一种方法包括，例如：获得具有至少一个源，至少一个漏极和至少一个牺牲栅极的晶片; 在所述至少一个源极上形成第一接触区域，以及在所述至少一个漏极上形成第二接触区域; 去除所述至少一个牺牲栅极; 形成至少一个栅极; 以及在所述第一接触区域和所述第二接触区域上形成至少一个小接触。 还公开了一种中间半导体器件。

公开(公告)号：US20180174965A1

公开(公告)日：2018-06-21

申请号：US15381826

申请日：2016-12-16

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Vimal KAMINENI ,  James KELLY ,  Praneet ADUSUMILLI ,  Oscar VAN DER STRATEN ,  Balasubramanian PRANATHARTHIHARAN

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L21/76883 ,  H01L21/76882 ,  H01L23/53209

Abstract: Devices and methods of fabricating integrated circuit devices via cobalt fill metallization are provided. A method includes, for instance, providing an intermediate semiconductor device having at least one trench, forming at least one layer of semiconductor material on the device, depositing a first cobalt (Co) layer on the second layer, and performing an anneal reflow process on the device. Also provided are intermediate semiconductor devices. An intermediate semiconductor device includes, for instance, at least one trench formed within the device, the trench having a bottom portion and sidewalls, at least one layer of semiconductor material disposed on the device, a first cobalt (Co) layer disposed on the at least one layer of semiconductor material, wherein the at least one layer of semiconductor material includes at least a first semiconductor material and a second semiconductor material.

公开(公告)号：US20160141379A1

公开(公告)日：2016-05-19

申请号：US14541754

申请日：2014-11-14

Applicant: GLOBALFOUNDRIES INC. ,  INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hui ZANG ,  Balasubramanian PRANATHARTHIHARAN

IPC: H01L29/417 ,  H01L21/02 ,  H01L21/28 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/3213 ,  H01L29/40 ,  H01L21/311

CPC classification number: H01L29/41783 ,  H01L21/28008 ,  H01L21/76801 ,  H01L21/76883 ,  H01L21/76897 ,  H01L23/485 ,  H01L29/401 ,  H01L29/785

Abstract: Devices and methods for forming semiconductor devices with middle of line capacitance reduction in self-aligned contact process flow and fabrication are provided. One method includes, for instance: obtaining a wafer with at least one source, drain, and gate; forming a first contact region over the at least one source and a second contact region over the at least one drain; and forming at least one first and second small contact over the first and second contact regions. One intermediate semiconductor device includes, for instance: a wafer with a gate, source region, and drain region; at least one first contact region positioned over a portion of the source; at least one second contact region positioned over a portion of the drain; at least one first small contact positioned above the first contact region; and at least one second small contact positioned above the second contact region.

Abstract translation: 提供了用于形成具有自对准接触工艺流程和制造中线路电容减小的半导体器件的器件和方法。 一种方法包括例如：获得具有至少一个源极，漏极和栅极的晶片; 在所述至少一个源极上形成第一接触区域，以及在所述至少一个漏极上形成第二接触区域; 以及在所述第一和第二接触区域上形成至少一个第一和第二小接触。 一个中间半导体器件包括例如：具有栅极，源极区和漏极区的晶片; 位于所述源的一部分上方的至少一个第一接触区域; 至少一个第二接触区域位于所述排水管的一部分上方; 位于所述第一接触区域上方的至少一个第一小接触件; 以及位于第二接触区域上方的至少一个第二小接触件。