公开(公告)号：US20190206717A1

公开(公告)日：2019-07-04

申请号：US15861799

申请日：2018-01-04

申请人： GLOBALFOUNDRIES Inc.

发明人： Xuelian Zhu ,  Jia Zeng ,  Chenchen Wang ,  Jongwook Kye

IPC分类号： H01L21/768 ,  H01L21/48

CPC分类号： H01L21/768 ,  H01L21/4857

摘要： Methods of patterning metallization lines having variable widths in a metallization layer. A first mandrel layer is formed over a mask layer, with the mask layer overlying a second mandrel layer. The first mandrel layer is etched to form mandrel lines that have variable widths. The first non-mandrel trenches are etched in the mask layer, where the non-mandrel trenches have variable widths. The first mandrel lines are used to etch mandrel trenches in the mask layer, so that the mandrel lines and first non-mandrel lines define a mandrel pattern. The second mandrel layer is etched according to the mandrel pattern to form second mandrel lines, with the second mandrel lines having the variable widths of the plurality of first mandrel lines and the variable widths of the plurality of non-mandrel trenches.

公开(公告)号：US09679809B1

公开(公告)日：2017-06-13

申请号：US15077564

申请日：2016-03-22

申请人： GLOBALFOUNDRIES Inc.

发明人： Jongwook Kye ,  Yan Wang ,  Chenchen Wang ,  Wenhui Wang ,  Lei Yuan ,  Jia Zeng ,  Guillaume Bouche

IPC分类号： H01L21/768 ,  H01L21/311 ,  H01L21/28 ,  H01L45/00

CPC分类号： H01L21/28141 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/76816 ,  H01L45/1691

摘要： A method of forming a pattern for interconnect lines in an integrated circuit includes providing a structure having a first lithographic stack, a mandrel layer and a pattern layer disposed over a dielectric stack. Patterning the structure to form mandrels in the mandrel layer and disposing a spacer layer over the mandrels. Etching the spacer layer to form spacers disposed on sidewalls of the mandrels. The spacers and mandrels defining beta and gamma regions. A beta region includes a beta block mask portion and a gamma region includes a gamma block mask portion of the pattern layer. The method also includes etching a beta pillar over the beta block mask portion and etching a gamma pillar over the gamma block mask portion. The method also includes etching the structure to form a pattern in the pattern layer, the pattern including the gamma and beta block mask portions.

公开(公告)号：US10366917B2

公开(公告)日：2019-07-30

申请号：US15861799

申请日：2018-01-04

申请人： GLOBALFOUNDRIES Inc.

发明人： Xuelian Zhu ,  Jia Zeng ,  Chenchen Wang ,  Jongwook Kye

IPC分类号： H01L21/48 ,  H01L21/768

摘要： Methods of patterning metallization lines having variable widths in a metallization layer. A first mandrel layer is formed over a mask layer, with the mask layer overlying a second mandrel layer. The first mandrel layer is etched to form mandrel lines that have variable widths. The first non-mandrel trenches are etched in the mask layer, where the non-mandrel trenches have variable widths. The first mandrel lines are used to etch mandrel trenches in the mask layer, so that the mandrel lines and first non-mandrel lines define a mandrel pattern. The second mandrel layer is etched according to the mandrel pattern to form second mandrel lines, with the second mandrel lines having the variable widths of the plurality of first mandrel lines and the variable widths of the plurality of non-mandrel trenches.

公开(公告)号：US10147714B2

公开(公告)日：2018-12-04

申请号：US15289401

申请日：2016-10-10

申请人： GLOBALFOUNDRIES INC.

发明人： Yan Wang ,  Jia Zeng ,  Chenchen Wang ,  Wenhui Wang ,  Lei Yuan ,  Jongwook Kye

IPC分类号： H01L27/02 ,  H01L21/768 ,  G06F17/50

摘要： At least one method, apparatus and system disclosed involves providing a functional cell for a circuit layout for an integrated circuit device. A determination as to a first location for a two-dimensional portion of a first power rail in a functional cell is made. A first portion of the first power rail is formed in a first direction. A second portion of the first power rail is formed in a second direction in the first location for the two-dimensional portion.

公开(公告)号：US20160335389A1

公开(公告)日：2016-11-17

申请号：US14712830

申请日：2015-05-14

申请人： GLOBALFOUNDRIES Inc.

发明人： Lei Yuan ,  Yan Wang ,  Chenchen Wang ,  Jongwook Kye

IPC分类号： G06F17/50

CPC分类号： G06F17/5081 ,  G06F17/5072 ,  G06F17/5077

摘要： At least one method, apparatus and system disclosed involves circuit layout for an integrated circuit device. A design for an integrated circuit device is received. The design comprises a functional cell. A first substitute functional cell for a first value of shift of a set of routing tracks respective to the boundary of the functional cell is provided. The first substitute functional cell comprises at least one pin moved by an amount of the first value. A determination is made as to whether an amount of shift of the set of routing tracks corresponds to the first value. The functional cell is replaced with the first substitute functional cell in response to a determination that the amount of shift of the set of routing tracks corresponds to the first value.

摘要翻译： 所公开的至少一种方法，装置和系统涉及用于集成电路装置的电路布局。 接收集成电路装置的设计。 该设计包括功能单元。 提供了与功能单元的边界相对应的一组路线轨迹的第一移位值的第一替代功能单元。 第一替代功能单元包括移动了第一值的量的至少一个销。 确定路由路径组的移位量是否对应于第一值。 响应于确定路由路径集合的偏移量对应于第一值，功能单元被第一替代功能单元替换。

公开(公告)号：US20180102354A1

公开(公告)日：2018-04-12

申请号：US15289401

申请日：2016-10-10

申请人： GLOBALFOUNDRIES INC.

发明人： Yan Wang ,  Jia Zeng ,  Chenchen Wang ,  Wenhui Wang ,  Lei Yuan ,  Jongwook Kye

IPC分类号： H01L27/02 ,  H01L21/768 ,  G06F17/50

CPC分类号： H01L27/0207 ,  G06F17/5077 ,  H01L21/76838

摘要： At least one method, apparatus and system disclosed involves providing a functional cell for a circuit layout for an integrated circuit device. A determination as to a first location for a two-dimensional portion of a first power rail in a functional cell is made. A first portion of the first power rail is formed in a first direction. A second portion of the first power rail is formed in a second direction in the first location for the two-dimensional portion.

公开(公告)号：US09727685B2

公开(公告)日：2017-08-08

申请号：US14712830

申请日：2015-05-14

申请人： GLOBALFOUNDRIES Inc.

发明人： Lei Yuan ,  Yan Wang ,  Chenchen Wang ,  Jongwook Kye

IPC分类号： G06F17/50

CPC分类号： G06F17/5081 ,  G06F17/5072 ,  G06F17/5077

摘要： At least one method, apparatus and system disclosed involves circuit layout for an integrated circuit device. A design for an integrated circuit device is received. The design comprises a functional cell. A first substitute functional cell for a first value of shift of a set of routing tracks respective to the boundary of the functional cell is provided. The first substitute functional cell comprises at least one pin moved by an amount of the first value. A determination is made as to whether an amount of shift of the set of routing tracks corresponds to the first value. The functional cell is replaced with the first substitute functional cell in response to a determination that the amount of shift of the set of routing tracks corresponds to the first value.