Nitride layer protection between PFET source/drain regions and dummy gate during source/drain etch
    1.
    发明授权
    Nitride layer protection between PFET source/drain regions and dummy gate during source/drain etch 有权
    在源/漏蚀刻期间,PFET源极/漏极区域和伪栅极之间的氮化物层保护

    公开(公告)号:US09419139B2

    公开(公告)日:2016-08-16

    申请号:US14560428

    申请日:2014-12-04

    Abstract: Methods of using a nitride to protect source/drain regions during dummy gate removal and the resulting devices are disclosed. Embodiments include forming an oxide layer on a substrate; forming a nitride protection layer on the oxide layer; forming a dummy gate layer on the nitride protection layer; patterning the oxide, nitride, and dummy gate layers forming first and second dummy gate stacks on first and second portions of the substrate, each dummy gate stack comprising a dummy gate, the nitride protection layer, and the oxide layer, wherein a portion of the oxide layer extends along the substrate beyond side edges of the dummy gate; forming first and second source/drain cavities in the substrate at opposite sides of the first and second dummy gate stacks, respectively; growing first and second eSiGe source/drain regions in the first and second source/drain cavities, respectively; and removing the first dummy gate and the second dummy gate stack.

    Abstract translation: 公开了在伪栅极去除期间使用氮化物来保护源极/漏极区域的方法以及所得到的器件。 实施例包括在基板上形成氧化物层; 在氧化物层上形成氮化物保护层; 在氮化物保护层上形成虚拟栅极层; 图案化在衬底的第一和第二部分上形成第一和第二虚拟栅极堆叠的氧化物,氮化物和伪栅极层,每个伪栅极堆叠包括伪栅极,氮化物保护层和氧化物层,其中一部分 氧化物层沿着衬底延伸超过虚拟栅极的侧边缘; 在第一和第二伪栅极堆叠的相对侧分别在衬底中形成第一和第二源极/漏极空腔; 分别在第一和第二源极/漏极腔中生长第一和第二eSiGe源极/漏极区域; 以及去除第一伪栅极和第二虚拟栅极堆叠。

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