公开(公告)号：US09419139B2

公开(公告)日：2016-08-16

申请号：US14560428

申请日：2014-12-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Xusheng Wu ,  Hongxiang Mo ,  Qi Zhang ,  Byoung-Gi Min ,  Jeasung Park

IPC: H01L29/78 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66 ,  H01L21/02 ,  H01L21/306

CPC classification number: H01L29/7848 ,  H01L21/02057 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02247 ,  H01L21/02252 ,  H01L21/0228 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/28194 ,  H01L21/30604 ,  H01L21/823462 ,  H01L29/161 ,  H01L29/165 ,  H01L29/517 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66636

Abstract: Methods of using a nitride to protect source/drain regions during dummy gate removal and the resulting devices are disclosed. Embodiments include forming an oxide layer on a substrate; forming a nitride protection layer on the oxide layer; forming a dummy gate layer on the nitride protection layer; patterning the oxide, nitride, and dummy gate layers forming first and second dummy gate stacks on first and second portions of the substrate, each dummy gate stack comprising a dummy gate, the nitride protection layer, and the oxide layer, wherein a portion of the oxide layer extends along the substrate beyond side edges of the dummy gate; forming first and second source/drain cavities in the substrate at opposite sides of the first and second dummy gate stacks, respectively; growing first and second eSiGe source/drain regions in the first and second source/drain cavities, respectively; and removing the first dummy gate and the second dummy gate stack.

Abstract translation: 公开了在伪栅极去除期间使用氮化物来保护源极/漏极区域的方法以及所得到的器件。 实施例包括在基板上形成氧化物层; 在氧化物层上形成氮化物保护层; 在氮化物保护层上形成虚拟栅极层; 图案化在衬底的第一和第二部分上形成第一和第二虚拟栅极堆叠的氧化物，氮化物和伪栅极层，每个伪栅极堆叠包括伪栅极，氮化物保护层和氧化物层，其中一部分 氧化物层沿着衬底延伸超过虚拟栅极的侧边缘; 在第一和第二伪栅极堆叠的相对侧分别在衬底中形成第一和第二源极/漏极空腔; 分别在第一和第二源极/漏极腔中生长第一和第二eSiGe源极/漏极区域; 以及去除第一伪栅极和第二虚拟栅极堆叠。

公开(公告)号：US09583557B2

公开(公告)日：2017-02-28

申请号：US14835278

申请日：2015-08-25

Applicant: GLOBALFOUNDRIES, Inc.

Inventor： Lili Cheng ,  Dina H. Triyoso ,  Jeasung Park ,  David Paul Brunco ,  Robert Fox ,  Sanford Chu

IPC: H01L21/00 ,  H01L49/02 ,  H01L23/522 ,  H01L21/02 ,  G06F17/50

CPC classification number: H01L28/60 ,  G06F17/5068 ,  H01L21/02181 ,  H01L21/02189 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Integrated circuits including a MIMCAP device and methods of forming the integrated circuits are provided. An exemplary method of forming an integrated circuit including a MIMCAP device includes pre-determining a thickness of at least one of a bottom high-K layer or a top high-K layer of the MIMCAP device, followed by fabricating the MIMCAP device. The pre-determined thickness is established based upon a pre-determined TDDB lifetime for the MIMCAP device and a minimum target capacitance density at an applied voltage bias to be employed for the MIMCAP device. The MIMCAP device includes a bottom electrode and a dielectric layer disposed over the bottom electrode. The dielectric layer includes a stack of individual layers including the bottom high-K layer, the top high-K layer, and a lower-K layer sandwiched therebetween. At least one of the bottom high-K layer or the top high-K layer has the pre-determined thickness.

Abstract translation: 提供了包括MIMCAP器件的集成电路和形成集成电路的方法。 形成包括MIMCAP器件的集成电路的示例性方法包括预先确定MIMCAP器件的底部高K层或顶部高K层中的至少之一的厚度，然后制造MIMCAP器件。 预先确定的厚度是基于MIMCAP器件的预定的TDDB寿命和MIMCAP器件所采用的施加电压偏置下的最小目标电容密度而建立的。 MIMCAP器件包括设置在底部电极上的底部电极和电介质层。 电介质层包括层叠的各层，包括底部高K层，顶部高K层和夹在其间的下部K层。 底部高K层或顶部高K层中的至少一层具有预定厚度。

公开(公告)号：US20160064472A1

公开(公告)日：2016-03-03

申请号：US14835278

申请日：2015-08-25

Applicant: GLOBALFOUNDRIES, Inc.

Inventor： Lili Cheng ,  Dina H. Triyoso ,  Jeasung Park ,  David Paul Brunco ,  Robert Fox ,  Sanford Chu

IPC: H01L49/02 ,  G06F17/50 ,  H01L21/02 ,  H01L23/522 ,  H01L21/822

CPC classification number: H01L28/60 ,  G06F17/5068 ,  H01L21/02181 ,  H01L21/02189 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Integrated circuits including a MIMCAP device and methods of forming the integrated circuits are provided. An exemplary method of forming an integrated circuit including a MIMCAP device includes pre-determining a thickness of at least one of a bottom high-K layer or a top high-K layer of the MIMCAP device, followed by fabricating the MIMCAP device. The pre-determined thickness is established based upon a pre-determined TDDB lifetime for the MIMCAP device and a minimum target capacitance density at an applied voltage bias to be employed for the MIMCAP device. The MIMCAP device includes a bottom electrode and a dielectric layer disposed over the bottom electrode. The dielectric layer includes a stack of individual layers including the bottom high-K layer, the top high-K layer, and a lower-K layer sandwiched therebetween. At least one of the bottom high-K layer or the top high-K layer has the pre-determined thickness.

Abstract translation: 提供了包括MIMCAP器件的集成电路和形成集成电路的方法。 形成包括MIMCAP器件的集成电路的示例性方法包括预先确定MIMCAP器件的底部高K层或顶部高K层中的至少之一的厚度，然后制造MIMCAP器件。 预先确定的厚度是基于MIMCAP器件的预定的TDDB寿命和MIMCAP器件所采用的施加电压偏置下的最小目标电容密度而建立的。 MIMCAP器件包括设置在底部电极上的底部电极和电介质层。 电介质层包括层叠的各层，包括底部高K层，顶部高K层和夹在其间的下部K层。 底部高K层或顶部高K层中的至少一层具有预定厚度。