公开(公告)号：US09419139B2

公开(公告)日：2016-08-16

申请号：US14560428

申请日：2014-12-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Xusheng Wu ,  Hongxiang Mo ,  Qi Zhang ,  Byoung-Gi Min ,  Jeasung Park

IPC: H01L29/78 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66 ,  H01L21/02 ,  H01L21/306

CPC classification number: H01L29/7848 ,  H01L21/02057 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02247 ,  H01L21/02252 ,  H01L21/0228 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/28194 ,  H01L21/30604 ,  H01L21/823462 ,  H01L29/161 ,  H01L29/165 ,  H01L29/517 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66636

Abstract: Methods of using a nitride to protect source/drain regions during dummy gate removal and the resulting devices are disclosed. Embodiments include forming an oxide layer on a substrate; forming a nitride protection layer on the oxide layer; forming a dummy gate layer on the nitride protection layer; patterning the oxide, nitride, and dummy gate layers forming first and second dummy gate stacks on first and second portions of the substrate, each dummy gate stack comprising a dummy gate, the nitride protection layer, and the oxide layer, wherein a portion of the oxide layer extends along the substrate beyond side edges of the dummy gate; forming first and second source/drain cavities in the substrate at opposite sides of the first and second dummy gate stacks, respectively; growing first and second eSiGe source/drain regions in the first and second source/drain cavities, respectively; and removing the first dummy gate and the second dummy gate stack.

Abstract translation: 公开了在伪栅极去除期间使用氮化物来保护源极/漏极区域的方法以及所得到的器件。 实施例包括在基板上形成氧化物层; 在氧化物层上形成氮化物保护层; 在氮化物保护层上形成虚拟栅极层; 图案化在衬底的第一和第二部分上形成第一和第二虚拟栅极堆叠的氧化物，氮化物和伪栅极层，每个伪栅极堆叠包括伪栅极，氮化物保护层和氧化物层，其中一部分 氧化物层沿着衬底延伸超过虚拟栅极的侧边缘; 在第一和第二伪栅极堆叠的相对侧分别在衬底中形成第一和第二源极/漏极空腔; 分别在第一和第二源极/漏极腔中生长第一和第二eSiGe源极/漏极区域; 以及去除第一伪栅极和第二虚拟栅极堆叠。

公开(公告)号：US20160268435A1

公开(公告)日：2016-09-15

申请号：US14645121

申请日：2015-03-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ki Young Lee ,  Byoung-Gi Min ,  Kijik Lee

IPC: H01L29/78 ,  H01L29/06 ,  H01L21/02 ,  H01L29/66 ,  H01L21/324

CPC classification number: H01L29/7853 ,  H01L21/02521 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/324 ,  H01L29/0653 ,  H01L29/0692 ,  H01L29/66795 ,  H01L29/66818

Abstract: At least one method, apparatus and system disclosed herein fin field effect transistor (finFET) comprising a bulbous fin head. A fin of a gate of a transistor is formed. A first recess step is performed for striping a hard mask material by a first dimension to expose a first portion of the fin. An epitaxy layer is formed upon the first portion. An oxidation process is performed upon the fin. An oxide removal process is performed upon the fin to provide a bulbous shape upon the first portion.

Abstract translation: 本文公开的至少一种方法，装置和系统，鳍状场效应晶体管（finFET）包括球状翅片头。 形成晶体管的栅极的鳍。 执行第一凹陷步骤，以通过第一尺寸对硬掩模材料进行剥离以暴露鳍的第一部分。 外延层形成在第一部分上。 在翅片上进行氧化处理。 在翅片上进行氧化物去除处理以在第一部分上提供球形形状。

公开(公告)号：US09419101B1

公开(公告)日：2016-08-16

申请号：US14932394

申请日：2015-11-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jianwei Peng ,  Hong Yu ,  Zhao Lun ,  Tao Han ,  Hsien-Ching Lo ,  Basab Banerjee ,  Wen Zhi Gao ,  Byoung-Gi Min

IPC: H01L21/8232 ,  H01L29/66 ,  H01L29/78 ,  H01L27/108 ,  H01L27/088 ,  H01L21/8234

CPC classification number: H01L29/6656 ,  H01L21/823431 ,  H01L27/0886 ,  H01L27/10879 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: A method of forming spacers and the resulting fin-shaped field effect transistors are provided. Embodiments include forming a silicon (Si) fin over a substrate; forming a polysilicon gate over the Si fin; and forming a spacer on top and side surfaces of the polysilicon gate, and on exposed upper and side surfaces of the Si fin, the spacer including: a first layer and second layer having a first dielectric constant, and a third layer formed between the first and second layers and having a second dielectric constant, wherein the second dielectric constant is lower than the first dielectric constant.

Abstract translation: 提供了形成间隔物的方法和所得的鳍状场效应晶体管。 实施例包括在衬底上形成硅（Si）鳍; 在Si鳍上形成多晶硅栅极; 以及在所述多晶硅栅极的顶表面和侧表面上形成间隔物，并且在所述Si鳍的暴露的上表面和外表面上，所述间隔物包括：具有第一介电常数的第一层和第二层，以及形成在所述第一 和第二层并具有第二介电常数，其中第二介电常数低于第一介电常数。

公开(公告)号：US09735064B2

公开(公告)日：2017-08-15

申请号：US14812317

申请日：2015-07-29

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ming Lei ,  Byoung-Gi Min

IPC: G01R31/02 ,  H01L21/66

CPC classification number: H01L22/00 ,  H01J2237/24564 ,  H01J2237/24592 ,  H01J2237/2817 ,  H01L22/12 ,  H01L22/20

Abstract: A method and apparatus for detecting VC defects and determining the exact shorting locations based on charging dynamics induced by scan direction variation are provided. Embodiments include providing a substrate having at least a partially formed device thereon, the partially formed device having at least a word-line, a share contact, and a bit-line; performing a first EBI on the at least partially formed device in a single direction; classifying defects by ADC based on the first EBI inspection; selecting DOI among the classified defects for further review; performing a second EBI on the DOI in a first, second, third, and fourth direction; comparing a result of the first direction against a result of the second direction and/or a result of the third direction against a result of the fourth direction; and determining a shorting location for each DOI based on the one or more comparisons.

公开(公告)号：US09601392B1

公开(公告)日：2017-03-21

申请号：US14927943

申请日：2015-10-30

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ming Lei ,  Byoung-Gi Min ,  Xusheng Wu

IPC: H01L21/66 ,  H01L27/11

CPC classification number: H01L22/14 ,  G11C11/4125 ,  G11C29/50008 ,  G11C2029/5002 ,  H01L22/30 ,  H01L22/34 ,  H01L27/1104

Abstract: A method and device for characterizing a DC parameter of a SRAM device based on TDCD are provided. Embodiments include forming a SRAM test device, the SRAM test device having a top edge and a bottom edge and at least a first and a second S/D contact, a gate contact, and a channel region; inducing an inversion charge in the channel region through the gate contact; scanning the first S/D contact with an ebeam subsequent to inducing the inversion charge; and characterizing at least one DC parameter of the SRAM test device based on a dissipation of the inversion charge between the steps of inducing and scanning

公开(公告)号：US09543441B2

公开(公告)日：2017-01-10

申请号：US14645121

申请日：2015-03-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ki Young Lee ,  Byoung-Gi Min ,  Kijik Lee

IPC: H01L21/20 ,  H01L21/306 ,  H01L29/78 ,  H01L27/085 ,  H01L29/66 ,  H01L21/324 ,  H01L21/02 ,  H01L29/06

CPC classification number: H01L29/7853 ,  H01L21/02521 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/324 ,  H01L29/0653 ,  H01L29/0692 ,  H01L29/66795 ,  H01L29/66818

Abstract: At least one method, apparatus and system disclosed herein fin field effect transistor (finFET) comprising a bulbous fin head. A fin of a gate of a transistor is formed. A first recess step is performed for striping a hard mask material by a first dimension to expose a first portion of the fin. An epitaxy layer is formed upon the first portion. An oxidation process is performed upon the fin. An oxide removal process is performed upon the fin to provide a bulbous shape upon the first portion.

Abstract translation: 本文公开的至少一种方法，装置和系统，鳍状场效应晶体管（finFET）包括球状翅片头。 形成晶体管的栅极的鳍。 执行第一凹陷步骤，以通过第一尺寸对硬掩模材料进行剥离以暴露鳍的第一部分。 在第一部分上形成外延层。 在翅片上进行氧化处理。 在翅片上进行氧化物去除处理以在第一部分上提供球形形状。