公开(公告)号：US20140349479A1

公开(公告)日：2014-11-27

申请号：US13901778

申请日：2013-05-24

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Oliver Mieth ,  Torsten Huisinga ,  Carsten Peters ,  Bernd Hintze ,  Grit Bonsdorf

IPC: H01L21/768

CPC classification number: H01L21/76897 ,  C23F1/32 ,  C23F1/38 ,  H01L21/02063 ,  H01L21/31144 ,  H01L21/32134 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76814

Abstract: A method includes providing a semiconductor structure. The semiconductor structure includes an electrically conductive feature including a first metal, a dielectric material provided over the electrically conductive feature and a hardmask. The hardmask includes a hardmask material and is provided over the dielectric material. An opening is provided in the interlayer dielectric and the hardmask. A portion of the electrically conductive feature is exposed at a bottom of the opening. The hardmask is removed. The removal of the hardmask includes exposing the semiconductor structure to an etching solution including hydrogen peroxide and a corrosion inhibitor. After the removal of the hardmask, the semiconductor structure is rinsed. Rinsing the semiconductor structure includes exposing the semiconductor structure to an alkaline rinse solution.

Abstract translation: 一种方法包括提供半导体结构。 半导体结构包括导电特征，其包括第一金属，设置在导电特征上的介电材料和硬掩模。 硬掩模包括硬掩模材料并且设置在电介质材料上。 在层间电介质和硬掩模中设置开口。 导电特征的一部分暴露在开口的底部。 硬掩模被删除。 去除硬掩模包括将半导体结构暴露于包括过氧化氢和腐蚀抑制剂的蚀刻溶液。 在去除硬掩模之后，冲洗半导体结构。 冲洗半导体结构包括将半导体结构暴露于碱性冲洗溶液中。

公开(公告)号：US09257329B2

公开(公告)日：2016-02-09

申请号：US14185398

申请日：2014-02-20

Applicant: GLOBALFOUNDRIES, Inc.

Inventor： Oliver Mieth ,  Carsten Peters ,  Torsten Huisinga

IPC: H01L21/3105 ,  H01L21/768

CPC classification number: H01L21/76826 ,  H01L21/3105 ,  H01L21/76804 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76829 ,  H01L21/76895

Abstract: Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes densifying an upper-surface portion of an ILD layer of dielectric material that overlies a metallization layer above a semiconductor substrate to form a densified surface layer of dielectric material. The densified surface layer and the ILD layer are etched through to expose a metal line of the metallization layer.

Abstract translation: 提供了制造集成电路的方法。 在一个示例中，用于制造集成电路的方法包括使覆盖在半导体衬底之上的金属化层上的介电材料的ILD层的上表面部分致密化，以形成电介质材料的致密表面层。 蚀刻致密表面层和ILD层以暴露金属化层的金属线。

公开(公告)号：US20150235896A1

公开(公告)日：2015-08-20

申请号：US14185398

申请日：2014-02-20

Applicant: GLOBALFOUNDRIES, Inc.

Inventor： Oliver Mieth ,  Carsten Peters ,  Torsten Huisinga

IPC: H01L21/768

CPC classification number: H01L21/76826 ,  H01L21/3105 ,  H01L21/76804 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76829 ,  H01L21/76895

Abstract: Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes densifying an upper-surface portion of an ILD layer of dielectric material that overlies a metallization layer above a semiconductor substrate to form a densified surface layer of dielectric material. The densified surface layer and the ILD layer are etched through to expose a metal line of the metallization layer.

Abstract translation: 提供了制造集成电路的方法。 在一个示例中，用于制造集成电路的方法包括使覆盖在半导体衬底之上的金属化层上的介电材料的ILD层的上表面部分致密化，以形成电介质材料的致密表面层。 蚀刻致密表面层和ILD层以暴露金属化层的金属线。