公开(公告)号：US20160005598A1

公开(公告)日：2016-01-07

申请号：US14321866

申请日：2014-07-02

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Sipeng GU ,  Sandeep GAAN ,  Zhiguo SUN ,  Huang LIU ,  Adam SELSLEY

IPC: H01L21/02

CPC classification number: H01L21/02164 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/321

Abstract: Methods for fabricating a layered circuit structure are provided, which include, for instance: depositing a first material layer above a substrate, the first material layer having an oxidized upper surface; providing a second material layer over the oxidized upper surface of the first material layer; and inhibiting diffusion of one or more elements from the oxidized upper surface of the first material layer into either the first material layer or the second material layer during the providing of the second material layer over the oxidized upper surface of the first material layer. The inhibiting may include one or more of modifying a characteristic(s) of the first material layer, forming a protective layer over the oxidized upper surface of the first material layer, or altering at least one process parameter employed in providing the second material layer.

Abstract translation: 提供了一种用于制造分层电路结构的方法，其包括例如：在衬底上沉积第一材料层，第一材料层具有氧化的上表面; 在所述第一材料层的氧化的上表面上提供第二材料层; 并且在第二材料层在第一材料层的氧化的上表面上提供第二材料层期间，抑制一个或多个元件从第一材料层的氧化的上表面扩散到第一材料层或第二材料层中。 抑制可以包括一个或多个修饰第一材料层的特征，在第一材料层的氧化的上表面上形成保护层，或改变在提供第二材料层中使用的至少一个工艺参数。

公开(公告)号：US20160284540A1

公开(公告)日：2016-09-29

申请号：US14666787

申请日：2015-03-24

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Shishir RAY ,  Yiqun LIU ,  Jin Ping LIU ,  Fabio D'ADDAMIO ,  Sandeep GAAN

IPC: H01L21/02 ,  H01L29/06 ,  H01L29/12

CPC classification number: H01L21/02181 ,  C23C16/308 ,  G11C11/22 ,  H01L21/02189 ,  H01L21/0234 ,  H01L21/28185 ,  H01L21/28194 ,  H01L29/513 ,  H01L29/517

Abstract: Provided is a semiconductor device that includes a semiconductor substrate and a 10 to 40 Å thick high-k dielectric layer that contains one or both of hafnium dioxide (HfO2) and zirconium dioxide (ZrO2). The high-k dielectric layer is disposed on the semiconductor substrate, and it contains at least some tetragonal phase HfO2 and/or tetragonal phase ZrO2. Also provided are methods for making the semiconductor device, and electronic devices that employ the semiconductor device.

Abstract translation: 提供了一种半导体器件，其包括半导体衬底和包含二氧化铪（HfO 2）和二氧化锆（ZrO 2）中的一种或两者的10至40厚的高k电介质层。 高k电介质层设置在半导体衬底上，并且其包含至少一些四方相HfO 2和/或四方相ZrO 2。 还提供了制造半导体器件的方法以及采用该半导体器件的电子器件。

公开(公告)号：US20150263169A1

公开(公告)日：2015-09-17

申请号：US14207822

申请日：2014-03-13

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Sipeng GU ,  Zhiguo SUN ,  Sandeep GAAN ,  Danni CHEN ,  Wen-Pin PENG ,  Huang LIU

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/40

CPC classification number: H01L29/7843 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02205 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/76801 ,  H01L21/76829 ,  H01L29/401 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545

Abstract: Semiconductor structures and fabrication methods are provided having a bridging film which facilitates adherence of both an underlying layer of dielectric material and an overlying stress-inducing layer. The method includes, for instance, providing a layer of dielectric material, with at least one gate structure disposed therein, over a semiconductor substrate; providing a bridging film over the layer of dielectric material with the at least one gate structure; and providing a stress-inducing layer over the bridging film. The bridging film is selected to facilitate adherence of both the underlying layer of dielectric material and the overlying stress-inducing layer by, in part, forming a chemical bond with the layer of dielectric material, without forming a chemical bond with the stress-inducing layer.

Abstract translation: 提供半导体结构和制造方法，其具有桥接膜，其有助于介电材料的下层和上覆的应力诱导层的粘附。 该方法包括例如在半导体衬底上提供其中设置有至少一个栅极结构的电介质材料层; 在所述介​​电材料层上提供具有所述至少一个栅极结构的桥接膜; 并在桥接膜上提供应力诱导层。 选择桥接膜以便于通过部分地与电介质材料层形成化学键而使介电材料的下层和上覆的应力诱导层两者粘附，而不与应力诱导层形成化学键 。