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公开(公告)号：US09571765B2
公开(公告)日：2017-02-14
申请号：US14750067
申请日：2015-06-25
Applicant: General Electric Company
Inventor： Jianjun Guo , Brian David Yanoff , Jonathan David Short , Biju Jacob
CPC classification number: H04N5/369 , H01L27/14641 , H04N5/347 , H04N5/37457 , H04N5/378
Abstract: An imager including sub-imager pixel arrays having a plurality of four-side buttable imagers distributed on a substrate and an on-chip digitizing readout circuit. Pixel groupings formed from among the plurality of four-side buttable imagers. The readout electronics including a buffer amplifier for each of the pixel groupings and connected to respective outputs of each four-side buttable imager of the pixel grouping. A plurality of shared analog front ends, each shared analog front end connected to respective multiple buffer amplifiers from among the plurality of pixel groupings. An analog-to-digital converter located at a common centroid location relative to the plurality of shared analog front ends, the analog-to-digital converter having a fully addressable input selection to individually select an output from each of the plurality of shared analog front ends. An output of the analog-to-digital converter connected to a trace on a back surface of the wafer substrate by a through-substrate-via.
Abstract translation: 包括具有分布在基板上的多个四边对称成像器的子成像像素阵列和片上数字化读出电路的成像器。 从多个四面对面的成像器中形成的像素组。 读出电路包括用于每个像素分组的缓冲放大器，并且连接到像素分组的每个四面可图像成像器的相应输出。 多个共享模拟前端，每个共享模拟前端从多个像素分组中连接到相应的多个缓冲放大器。 一种模数转换器，位于相对于多个共享模拟前端的公共中心位置处，该模数转换器具有完全可寻址的输入选择，以单独选择多个共享模拟前端中的每一个的输出 结束。 模数转换器的输出通过基板通孔连接到晶片衬底背面上的迹线。
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公开(公告)号：US20160084970A1
公开(公告)日：2016-03-24
申请号：US14851518
申请日：2015-09-11
Applicant: General Electric Company
Inventor： JianJun Guo , Sergei Ivanovich Dolinsky , David Leo McDaniel , Jonathan David Short
IPC: G01T1/24
CPC classification number: G01T1/248 , G01T1/247 , G01T1/249 , H01L27/14603 , H01L27/14609 , H01L27/14663 , H01L31/107 , H04N5/32
Abstract: Embodiments of a solid state photomultiplier are provided herein. In some embodiments, a photosensor may include a sensing element; and readout electronics, wherein the sensing element is AC coupled to the readout electronics. In some embodiments, a solid state photomultipler may include a microcell having; a sensing element; and readout electronics, wherein the sensing element is AC coupled to the readout electronics.
Abstract translation: 本文提供了固态光电倍增管的实施例。 在一些实施例中，光电传感器可以包括感测元件; 和读出电子器件，其中感测元件被AC耦合到读出电子器件。 在一些实施例中，固态光电倍增管可以包括具有： 传感元件; 和读出电子器件，其中感测元件被AC耦合到读出电子器件。
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公开(公告)号：US09960124B2
公开(公告)日：2018-05-01
申请号：US14061531
申请日：2013-10-23
Applicant: General Electric Company
IPC: H01L23/552
CPC classification number: H01L23/552 , H01L2924/0002 , H01L2924/00
Abstract: In certain embodiments, a mixed signal integrated circuit is provided that includes both a digital portion and an analog portion. A shield is provided that overlays one of the digital portion or the analog portion of the mixed signal integrated circuit. The shield limits propagation of signals between the digital portion and the analog portion of the mixed signal integrated circuit.
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公开(公告)号：US09754981B2
公开(公告)日：2017-09-05
申请号：US15077006
申请日：2016-03-22
Applicant: GENERAL ELECTRIC COMPANY
Inventor： Jianjun Guo , Sergei Ivanovich Dolinsky , Jonathan David Short
IPC: H01L27/146 , H01L31/107 , H01L31/0352
CPC classification number: H01L27/14612 , H01L27/14663 , H01L31/035272
Abstract: Embodiments of a solid state photomultiplier are provided herein. In some embodiments, a solid state photomultiplier may include an epitaxial layer, a high voltage region formed in the epitaxial layer, a low voltage region formed in the epitaxial layer, and an intermediate region disposed between the high voltage region and low voltage region, wherein the high voltage region is electrically coupled to the low voltage region via the intermediate region, and wherein at least a portion of the epitaxial layer is disposed between the high voltage region and intermediate region and between the low voltage region and the intermediate region.
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公开(公告)号：US09568620B2
公开(公告)日：2017-02-14
申请号：US14851518
申请日：2015-09-11
Applicant: General Electric Company
Inventor： JianJun Guo , Sergei Ivanovich Dolinsky , David Leo McDaniel , Jonathan David Short
IPC: G01T1/24 , H01L31/107 , H04N5/32
CPC classification number: G01T1/248 , G01T1/247 , G01T1/249 , H01L27/14603 , H01L27/14609 , H01L27/14663 , H01L31/107 , H04N5/32
Abstract: Embodiments of a solid state photomultiplier are provided herein. In some embodiments, a photosensor may include a sensing element; and readout electronics, wherein the sensing element is AC coupled to the readout electronics. In some embodiments, a solid state photomultipler may include a microcell having; a sensing element; and readout electronics, wherein the sensing element is AC coupled to the readout electronics.
Abstract translation: 本文提供了固态光电倍增管的实施例。 在一些实施例中，光电传感器可以包括感测元件; 和读出电子器件，其中感测元件被AC耦合到读出电子器件。 在一些实施例中，固态光电倍增管可以包括具有： 传感元件; 和读出电子器件，其中感测元件被AC耦合到读出电子器件。
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Patent Agency Ranking
公开(公告)号：US20160381311A1
公开(公告)日：2016-12-29
申请号：US14750067
申请日：2015-06-25
Applicant: General Electric Company
Inventor： Jianjun Guo , Brian David Yanoff , Jonathan David Short , Biju Jacob
CPC classification number: H04N5/369 , H01L27/14641 , H04N5/347 , H04N5/37457 , H04N5/378
Abstract: An imager including sub-imager pixel arrays having a plurality of four-side buttable imagers distributed on a substrate and an on-chip digitizing readout circuit. Pixel groupings formed from among the plurality of four-side buttable imagers. The readout electronics including a buffer amplifier for each of the pixel groupings and connected to respective outputs of each four-side buttable imager of the pixel grouping. A plurality of shared analog front ends, each shared analog front end connected to respective multiple buffer amplifiers from among the plurality of pixel groupings. An analog-to-digital converter located at a common centroid location relative to the plurality of shared analog front ends, the analog-to-digital converter having a fully addressable input selection to individually select an output from each of the plurality of shared analog front ends. An output of the analog-to-digital converter connected to a trace on a back surface of the wafer substrate by a through-substrate-via.
Abstract translation: 包括具有分布在基板上的多个四边对称成像器的子成像像素阵列和片上数字化读出电路的成像器。 从多个四面对面的成像器中形成的像素组。 读出电路包括用于每个像素分组的缓冲放大器，并且连接到像素分组的每个四面可图像成像器的相应输出。 多个共享模拟前端，每个共享模拟前端从多个像素分组中连接到相应的多个缓冲放大器。 一种模数转换器，位于相对于多个共享模拟前端的公共中心位置处，该模数转换器具有完全可寻址的输入选择，以单独选择多个共享模拟前端中的每一个的输出 结束。 模数转换器的输出通过基板通孔连接到晶片衬底背面上的迹线。
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公开(公告)号：US09525852B2
公开(公告)日：2016-12-20
申请号：US13958209
申请日：2013-08-02
Applicant: General Electric Company
Inventor： Robert Gideon Wodnicki , Sora Kim , Ansas Matthias Kasten , Kevin Coombs , Clark Alexander Bendall , Jonathan David Short
CPC classification number: H04N7/183 , A61B1/045 , H04N5/23203 , H04N5/3765 , H04N2005/2255
Abstract: An embedded imaging system in one embodiment includes an encoding module, an imaging module, and a cable. The encoding module is disposed proximate to a proximal end of the system, and is configured to encode frame synchronizing information into timing information comprising a reference clock. The imaging module is disposed proximate the distal end, and includes an image capture device configured to obtain imaging information and a decoding module. The decoding control module is configured to obtain the timing information, to decode the timing information to obtain recovered frame synchronizing information, and to control the image capture device using the recovered frame synchronizing information. The cable is interposed between the proximal end and the distal end, and is configured for passage therethrough of the timing information and the imaging information.
Abstract translation: 一个实施例中的嵌入式成像系统包括编码模块，成像模块和电缆。 编码模块靠近系统的近端设置，并且被配置为将帧同步信息编码成包括参考时钟的定时信息。 成像模块设置在远端附近，并且包括被配置为获得成像信息和解码模块的图像捕获装置。 解码控制模块被配置为获得定时信息，以解码定时信息以获得恢复的帧同步信息，并且使用恢复的帧同步信息来控制图像捕获设备。 电缆插入在近端和远端之间，并且被构造成用于通过定时信息和成像信息。
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公开(公告)号：US20150108357A1
公开(公告)日：2015-04-23
申请号：US14061531
申请日：2013-10-23
Applicant: General Electric Company
IPC: H01L23/552 , G01T1/24
CPC classification number: H01L23/552 , H01L2924/0002 , H01L2924/00
Abstract: In certain embodiments, a mixed signal integrated circuit is provided that includes both a digital portion and an analog portion. A shield is provided that overlays one of the digital portion or the analog portion of the mixed signal integrated circuit. The shield limits propagation of signals between the digital portion and the analog portion of the mixed signal integrated circuit.
Abstract translation: 在某些实施例中，提供了包括数字部分和模拟部分的混合信号集成电路。 提供覆盖混合信号集成电路的数字部分或模拟部分中的一个的屏蔽。 屏蔽限制信号在混合信号集成电路的数字部分和模拟部分之间的传播。
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公开(公告)号：US08564086B2
公开(公告)日：2013-10-22
申请号：US13853192
申请日：2013-03-29
Applicant: General Electric Company
Inventor： Wen Li , Jonathan David Short , George Edward Possin
IPC: H01L27/146
CPC classification number: H01L27/14601 , A61B6/032 , G01T1/2018 , G01T1/249 , H01L31/105
Abstract: An apparatus for reducing photodiode thermal gain coefficient includes a bulk semiconductor material having a light-illumination side. The bulk semiconductor material includes a minority charge carrier diffusion length property configured to substantially match a predetermined hole diffusion length value and a thickness configured to substantially match a predetermined photodiode layer thickness. The apparatus also includes a dead layer coupled to the light-illumination side of the bulk semiconductor material, the dead layer having a thickness configured to substantially match a predetermined thickness value and wherein an absolute value of a thermal coefficient of gain due to the minority carrier diffusion length property of the bulk semiconductor material is configured to substantially match an absolute value of a thermal coefficient of gain due to the thickness of the dead layer.
Abstract translation: 减少光电二极管热增益系数的装置包括具有光照射侧的体半导体材料。 体半导体材料包括少数电荷载流子扩散长度特性，其被配置为基本上匹配预定的空穴扩散长度值和被配置为基本匹配预定的光电二极管层厚度的厚度。 该装置还包括耦合到体半导体材料的光照射侧的死层，该死层具有被配置为基本匹配预定厚度值的厚度，并且其中由少数载体产生的增益热系数的绝对值 体半导体材料的扩散长度特性被配置为基本上匹配由于死层的厚度而导致的增益热系数的绝对值。
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公开(公告)号：US09689996B2
公开(公告)日：2017-06-27
申请号：US13857624
申请日：2013-04-05
Applicant: General Electric Company
Inventor： Naresh Kesavan Rao , James Wilson Rose , Christopher David Unger , Abdelaziz Ikhlef , Jonathan David Short
IPC: A61B6/00 , G01T1/24 , H01L27/146
CPC classification number: G01T1/247 , A61B6/42 , A61B6/4233 , H01L27/14661 , H01L27/14663
Abstract: Improved imaging systems are disclosed. More particularly, the present disclosure provides for an improved image sensor assembly for an imaging system, the image sensor assembly having an integrated photodetector array and its associated data acquisition electronics fabricated on the same substrate. By integrating the electronics on the same substrate as the photodetector array, this thereby reduces fabrications costs, and reduces interconnect complexity. Since both the photodiode contacts and the associated electronics are on the same substrate/plane, this thereby substantially eliminates certain expensive/time-consuming processing techniques. Moreover, the co-location of the electronics next to or proximal to the photodetector array provides for a much finer resolution detector assembly since the interconnect bottleneck between the electronics and the photodetector array is substantially eliminated/reduced. The co-location of the electronics next to or proximal to the photodetector array also enables/facilitates programmable pixel configuration for optimal image quality.
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