公开(公告)号：US10354871B2

公开(公告)日：2019-07-16

申请号：US15701192

申请日：2017-09-11

Applicant: General Electric Company

Inventor： Stacey Joy Kennerly ,  Victor Torres ,  David Lilienfeld ,  Robert Dwayne Gossman ,  Gregory Keith Dudoff

IPC: H01L21/02 ,  H01L21/04 ,  H01L21/768 ,  H01L23/532 ,  C23C14/16 ,  H01L21/285

Abstract: A method for sputtering an aluminum layer on a surface of a semiconductor device is presented. The method includes three sputtering steps for depositing the aluminum layer, where each sputtering step includes at least one sputtering parameter that is different from a corresponding sputtering parameter of another sputtering step. The surface of the semiconductor device includes a dielectric layer having a plurality of openings formed through the dielectric layer.

公开(公告)号：US10347489B2

公开(公告)日：2019-07-09

申请号：US13933366

申请日：2013-07-02

Applicant: General Electric Company

Inventor： Peter Almern Losee ,  Alexander Viktorovich Bolotnikov ,  Stacey Joy Kennerly

IPC: H01L21/04 ,  H01L29/16 ,  H01L29/66 ,  H01L29/739 ,  H01L29/78 ,  H01L29/06 ,  H01L29/74

Abstract: A method of manufacturing a semiconductor device is presented. The method includes providing a semiconductor layer comprising silicon carbide, wherein the semiconductor layer comprises a first region doped with a first dopant type. The method further includes implanting the semiconductor layer with a second dopant type using a single implantation mask and a substantially similar implantation dose to form a second region and a junction termination extension (JTE) in the semiconductor layer, wherein the implantation dose is in a range from about 2×1013 cm−2 to about 12×1013 cm−2. Semiconductor devices are also presented.

公开(公告)号：US10269951B2

公开(公告)日：2019-04-23

申请号：US15596977

申请日：2017-05-16

Applicant: General Electric Company

Inventor： Peter Almern Losee ,  Alexander Bolotnikov ,  Stacey Joy Kennerly ,  James William Kretchmer

IPC: H01L29/06 ,  H01L29/36 ,  H01L29/16 ,  H01L29/20 ,  H01L21/265 ,  H01L21/266 ,  H01L29/78 ,  H01L29/10 ,  H01L29/08

Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor device layer having silicon carbide and having an upper surface and a lower surface. The semiconductor device also includes a heavily doped body region formed in the upper surface of the semiconductor device layer. The semiconductor device further includes a gate stack formed adjacent to and on top of the upper surface of the semiconductor device layer, wherein the gate stack is not formed adjacent to the heavily doped body region.

公开(公告)号：US20180337273A1

公开(公告)日：2018-11-22

申请号：US15596977

申请日：2017-05-16

Applicant: General Electric Company

Inventor： Peter Almern Losee ,  Alexander Bolotnikov ,  Stacey Joy Kennerly ,  James William Kretchmer

IPC: H01L29/78 ,  H01L29/10

CPC classification number: H01L29/7811 ,  H01L29/0865 ,  H01L29/1083 ,  H01L29/1095

Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor device layer having silicon carbide and having an upper surface and a lower surface. The semiconductor device also includes a heavily doped body region formed in the upper surface of the semiconductor device layer. The semiconductor device further includes a gate stack formed adjacent to and on top of the upper surface of the semiconductor device layer, wherein the gate stack is not formed adjacent to the heavily doped body region.

公开(公告)号：US20150008446A1

公开(公告)日：2015-01-08

申请号：US13933366

申请日：2013-07-02

Applicant: General Electric Company

Inventor： Peter Almern Losee ,  Alexander Viktorovich Bolotnikov ,  Stacey Joy Kennerly

IPC: H01L21/04 ,  H01L29/16

CPC classification number: H01L21/046 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7395 ,  H01L29/74 ,  H01L29/7811

Abstract: A method of manufacturing a semiconductor device is presented. The method includes providing a semiconductor layer comprising silicon carbide, wherein the semiconductor layer comprises a first region doped with a first dopant type. The method further includes implanting the semiconductor layer with a second dopant type using a single implantation mask and a substantially similar implantation dose to form a second region and a junction termination extension (JTE) in the semiconductor layer, wherein the implantation dose is in a range from about 2×1013 cm−2 to about 12×1013 cm−2. Semiconductor devices are also presented.

Abstract translation: 提出了制造半导体器件的方法。 该方法包括提供包括碳化硅的半导体层，其中半导体层包括掺杂有第一掺杂剂类型的第一区域。 该方法还包括使用单个注入掩模和基本相似的注入剂量来注入具有第二掺杂剂类型的半导体层，以在半导体层中形成第二区域和结终止延伸（JTE），其中注入剂量在一个范围内 从约2×10 13 cm -2至约12×10 13 cm -2。 还提供了半导体器件。

公开(公告)号：US20190080906A1

公开(公告)日：2019-03-14

申请号：US15701192

申请日：2017-09-11

Applicant: General Electric Company

Inventor： Stacey Joy Kennerly ,  Victor Torres ,  David Lilienfeld ,  Robert Dwayne Gossman ,  Gregory Keith Dudoff

IPC: H01L21/02 ,  C23C14/16 ,  H01L21/04 ,  H01L23/532 ,  H01L21/285 ,  H01L21/768

CPC classification number: H01L21/02697 ,  C23C14/165 ,  H01L21/049 ,  H01L21/28568 ,  H01L21/76877 ,  H01L23/53223

Abstract: A method for sputtering an aluminum layer on a surface of a semiconductor device is presented. The method includes three sputtering steps for depositing the aluminum layer, where each sputtering step includes at least one sputtering parameter that is different from a corresponding sputtering parameter of another sputtering step. The surface of the semiconductor device includes a dielectric layer having a plurality of openings formed through the dielectric layer.