Method of limiting the noise bandwidth of a bandgap voltage generator and relative bandgap voltage generator
    1.
    发明授权
    Method of limiting the noise bandwidth of a bandgap voltage generator and relative bandgap voltage generator 有权
    限制带隙电压发生器和相对带隙电压发生器的噪声带宽的方法

    公开(公告)号:US07038440B2

    公开(公告)日:2006-05-02

    申请号:US11008470

    申请日:2004-12-09

    IPC分类号: G05F3/26

    CPC分类号: G05F3/30

    摘要: A bandgap voltage generator includes an output node for providing an output voltage, a current mirror coupled between the output node and a voltage reference, and a biasing transistor coupled to the output node. A feedback line includes a feedback transistor coupled to the output node. A current generator biases the feedback transistor by injecting a current into a bias node of the feedback line. A capacitor is coupled between the bias node and the voltage reference. The feedback line includes a circuit coupled between the bias node and the feedback transistor for causing a current to flow through the feedback transistor, and for increasing a resistance of a portion of the feedback line in parallel to the capacitor.

    摘要翻译: 带隙电压发生器包括用于提供输出电压的输出节点,耦合在输出节点和电压基准之间的电流镜,耦合到输出节点的偏置晶体管。 反馈线包括耦合到输出节点的反馈晶体管。 电流发生器通过将电流注入反馈线的偏置节点来偏置反馈晶体管。 电容器耦合在偏置节点和电压基准之间。 反馈线包括耦合在偏置节点和反馈晶体管之间的电路,用于使电流流过反馈晶体管,并且用于增加反馈线的一部分与电容器并联的电阻。

    Method and corresponding circuit structure to correlate the transconductance of transistors of different types
    2.
    发明申请
    Method and corresponding circuit structure to correlate the transconductance of transistors of different types 有权
    方法和相应的电路结构,使不同类型晶体管的跨导相关

    公开(公告)号:US20050035817A1

    公开(公告)日:2005-02-17

    申请号:US10883577

    申请日:2004-06-30

    IPC分类号: H03F1/32 H03F3/45

    摘要: A method and related circuit structure correlate the transconductance value of transistors of different type, for example MOS transistors and bipolar transistors. The structure comprises a first differential cell formed by transistors of the first type and a second differential cell formed by transistors of the second type connected to each other by means of a circuit portion responsible for calculating an error signal obtained as difference between the cell differential currents and applied to said first differential cell and to an output node of the same circuit structure obtaining a transconductance correlation independent from process tolerances and temperature.

    摘要翻译: 一种方法和相关电路结构将不同类型的晶体管的跨导值相关联,例如MOS晶体管和双极晶体管。 该结构包括由第一类型的晶体管形成的第一差分单元和由第二类型的晶体管形成的第二差分单元,该第二差分单元通过负责计算获得的误差信号的电路部分相互连接,该误差信号作为单元差分电流 并施加到所述第一差分单元和相同电路结构的输出节点,获得独立于过程公差和温度的跨导相关性。

    Method of limiting the noise bandwidth of a bandgap voltage generator and relative bandgap voltage generator
    3.
    发明申请
    Method of limiting the noise bandwidth of a bandgap voltage generator and relative bandgap voltage generator 有权
    限制带隙电压发生器和相对带隙电压发生器的噪声带宽的方法

    公开(公告)号:US20050151526A1

    公开(公告)日:2005-07-14

    申请号:US11008470

    申请日:2004-12-09

    IPC分类号: G05F3/04 G05F3/26 G05F3/30

    CPC分类号: G05F3/30

    摘要: A bandgap voltage generator includes an output node for providing an output voltage, a current mirror coupled between the output node and a voltage reference, and a biasing transistor coupled to the output node. A feedback line includes a feedback transistor coupled to the output node. A current generator biases the feedback transistor by injecting a current into a bias node of the feedback line. A capacitor is coupled between the bias node and the voltage reference. The feedback line includes a circuit coupled between the bias node and the feedback transistor for causing a current to flow through the feedback transistor, and for increasing a resistance of a portion of the feedback line in parallel to the capacitor.

    摘要翻译: 带隙电压发生器包括用于提供输出电压的输出节点,耦合在输出节点和电压基准之间的电流镜,耦合到输出节点的偏置晶体管。 反馈线包括耦合到输出节点的反馈晶体管。 电流发生器通过将电流注入反馈线的偏置节点来偏置反馈晶体管。 电容器耦合在偏置节点和电压基准之间。 反馈线包括耦合在偏置节点和反馈晶体管之间的电路,用于使电流流过反馈晶体管,并且用于增加反馈线的一部分与电容器并联的电阻。

    Transistor amplifying stage
    4.
    发明申请
    Transistor amplifying stage 审中-公开
    晶体管放大级

    公开(公告)号:US20050275464A1

    公开(公告)日:2005-12-15

    申请号:US11140506

    申请日:2005-05-27

    IPC分类号: H03F3/45

    CPC分类号: H03F3/45237 H03F3/45708

    摘要: An amplifying stage having a first circuit positioned between a first and a second reference voltage and having a first transistor with a first non-drivable terminal connected with a current supply and a second transistor having a first non-drivable terminal connected with a second non-drivable terminal of the first transistor, and the current supply connected to the first reference voltage, and a second circuit connected to the first circuit and fed by a current proportional to the current supplied by the current supply. The second circuit has at least one input terminal and is connected to a load. The first circuit has a connection between the first transistor and a drivable terminal of the second transistor for adapting current that passes through the second transistor to be the same as current from the current supply and the voltage between the first transistor and ground is greater than a saturation voltage between non-drivable terminals of the first transistor.

    摘要翻译: 放大级具有位于第一参考电压和第二参考电压之间的第一电路,并且具有第一晶体管,具有与电流源连接的第一不可驱动端子和具有与第二非可驱动端子连接的第二非可驱动端子的第二晶体管, 第一晶体管的可驱动端子和连接到第一参考电压的电流源,以及连接到第一电路并由与当前电源提供的电流成比例的电流馈送的第二电路。 第二电路具有至少一个输入端子并连接到负载。 第一电路在第一晶体管和第二晶体管的可驱动端之间具有连接,用于使通过第二晶体管的电流与来自电流源的电流相同,并且第一晶体管和地之间的电压大于 第一晶体管的不可驱动端子之间的饱和电压。

    Variable gain amplifier
    5.
    发明授权
    Variable gain amplifier 有权
    可变增益放大器

    公开(公告)号:US06661286B2

    公开(公告)日:2003-12-09

    申请号:US10075161

    申请日:2002-02-13

    IPC分类号: H03F345

    CPC分类号: H03G7/08

    摘要: A variable gain amplifier is described which comprises a first device to which a first control signal (Vc, Vc1) is applied so that the gain (Ai1, Ai) of an output signal (iout, io) of the first device (11, 22, Q45-Q48) with respect to a first input signal (in, i1, ir) is a function of the exponential type of the first control signal (Vc, Vc1). The amplifier comprises a feedback network (25, Q51-Q58) connected between an output terminal and an input terminal of the first device (22, Q45-Q48) so as to assure that the gain (Ai) in decibel of the first device (22, Q45-Q48) is a linear function of the first control signal (Vc1).

    摘要翻译: 描述了一种可变增益放大器,其包括第一装置,第一装置施加第一控制信号(Vc,Vc1),使得第一装置(11,22)的输出信号(iout,io)的增益(Ai1,Ai) 相对于第一输入信号(in,i1,ir),Q45-Q48是第一控制信号(Vc,Vc1)的指数类型的函数。 放大器包括连接在第一装置(22,Q45-Q48)的输出端子和输入端子之间的反馈网络(25,Q51-Q58),以便确保第一装置的分贝的增益(Ai)( 22,Q45-Q48)是第一控制信号(Vc1)的线性函数。

    Mixer with exponentially variable gain
    8.
    发明授权
    Mixer with exponentially variable gain 有权
    具有指数可变增益的混频器

    公开(公告)号:US06812770B2

    公开(公告)日:2004-11-02

    申请号:US10352788

    申请日:2003-01-28

    IPC分类号: G06F744

    摘要: An exponentially variable gain mixer circuit includes an oscillating circuit generating an alternating differential signal. A correction circuit is connected to the oscillating circuit and includes a first amplifier and a differential amplifier. The first amplifier receives an external gain variation command and generates a differential output signal that includes a control voltage and a bias voltage. The differential amplifier receives the alternating differential signal and generates a differential modulation signal. A variable gain mixer receives an input differential signal and generates an amplified differential signal as a function of the differential modulation signal and the control voltage.

    摘要翻译: 指数可变增益混频器电路包括产生交变差分信号的振荡电路。 校正电路连接到振荡电路,并包括第一放大器和差分放大器。 第一放大器接收外部增益变化指令,并产生包括控制电压和偏置电压的差分输出信号。 差分放大器接收交流差分信号并产生差分调制信号。 可变增益混频器接收输入差分信号并产生作为差分调制信号和控制电压的函数的放大的差分信号。

    Method for reducing the settling time in PLL circuits
    9.
    发明授权
    Method for reducing the settling time in PLL circuits 有权
    降低PLL电路稳定时间的方法

    公开(公告)号:US06636576B1

    公开(公告)日:2003-10-21

    申请号:US09413713

    申请日:1999-10-05

    IPC分类号: H03L7093

    CPC分类号: H03L7/189

    摘要: A method for reducing the settling time in PLL circuits, particularly for use in an RF transceiver, the PLL circuits including a phase comparator, a filter, a digital-analog converter and an adder that are suitable to produce in output a voltage (VC) for controlling a voltage-controlled oscillator provided by means of a varactor, the method including determining the dependency of the control voltage (VC) of the voltage-controlled oscillator on the frequency of a selected channel of a transmitter; and generating a law describing the variation of the output current (IDAC) of the digital-analog converter such that the voltage (VDAC) obtained from the output current of the digital-analog converter, added to an output voltage (Vf) of said filter keeps the filter voltage (Vf) constant in order to reduce the settling time of the PLL circuit as a selected channel varies.

    摘要翻译: 一种用于减少PLL电路中的建立时间的方法,特别是用于RF收发器中的PLL电路包括相位比较器,滤波器,数模转换器和加法器,其适于在输出端产生电压(VC) 用于控制通过变容二极管提供的压控振荡器,所述方法包括确定压控振荡器的控制电压(VC)对发射机所选频道的频率的依赖性; 以及产生描述所述数模转换器的输出电流(IDAC)的变化的定律,使得从所述数模转换器的输出电流获得的电压(VDAC)加到所述滤波器的输出电压(Vf)上 保持滤波电压(Vf)恒定,以便随着所选通道的变化而减小PLL电路的稳定时间。

    Method and corresponding circuit structure to correlate the transconductance of transistors of different types
    10.
    发明授权
    Method and corresponding circuit structure to correlate the transconductance of transistors of different types 有权
    方法和相应的电路结构,使不同类型晶体管的跨导相关

    公开(公告)号:US07126413B2

    公开(公告)日:2006-10-24

    申请号:US10883577

    申请日:2004-06-30

    IPC分类号: G01R19/00 H03F3/04 H03F3/16

    摘要: A method and related circuit structure correlate the transconductance value of transistors of different type, for example MOS transistors and bipolar transistors. The structure comprises a first differential cell formed by transistors of the first type and a second differential cell formed by transistors of the second type connected to each other by means of a circuit portion responsible for calculating an error signal obtained as difference between the cell differential currents and applied to said first differential cell and to an output node of the same circuit structure obtaining a transconductance correlation independent from process tolerances and temperature.

    摘要翻译: 一种方法和相关电路结构将不同类型的晶体管的跨导值相关联,例如MOS晶体管和双极晶体管。 该结构包括由第一类型的晶体管形成的第一差分单元和由第二类型的晶体管形成的第二差分单元,该第二差分单元通过负责计算获得的误差信号的电路部分相互连接,该误差信号作为单元差分电流 并施加到所述第一差分单元和相同电路结构的输出节点,获得独立于过程公差和温度的跨导相关性。