Partial refresh for synchronous dynamic random access memory (SDRAM) circuits
    1.
    发明授权
    Partial refresh for synchronous dynamic random access memory (SDRAM) circuits 有权
    同步动态随机存取存储器(SDRAM)电路的部分刷新

    公开(公告)号:US06665224B1

    公开(公告)日:2003-12-16

    申请号:US10153042

    申请日:2002-05-22

    IPC分类号: G11C700

    摘要: A semiconductor dynamic random access memory (DRAM) 300 with a programmable memory refresh counter 345 is presented. The counter 345 permits the specification of portions of the DRAM 300 to be refreshed, saving power and time over DRAMs that refresh the entire memory. The counter 345 may be programmed with a wordline address at the beginning of a block of memory and subsequent refresh operations automatically increment or decrement the value in the counter. Additionally, blocks of the memory not being refreshed can be accessed (written or read), improving the utilization of the memory device.

    摘要翻译: 提出了具有可编程存储器刷新计数器345的半导体动态随机存取存储器(DRAM)300。 计数器345允许更新DRAM 300的部分的指定,从而节省了刷新整个存储器的DRAM的功率和时间。 计数器345可以在存储器块的开始处用字线地址编程,并且随后的刷新操作自动地增加或减少计数器中的值。 此外,可以访问(书写或读取)不刷新的存储器块,从而提高存储器件的利用率。

    Voltage supply circuit, in particular for a DRAM memory circuit, as well as a method for controlling a supply source
    2.
    发明授权
    Voltage supply circuit, in particular for a DRAM memory circuit, as well as a method for controlling a supply source 有权
    电压供应电路,特别是用于DRAM存储器电路,以及用于控制供应源的方法

    公开(公告)号:US07379373B2

    公开(公告)日:2008-05-27

    申请号:US11295160

    申请日:2005-12-05

    IPC分类号: G11C5/14

    CPC分类号: G11C11/4074 G11C5/14

    摘要: A voltage supply circuit for providing an internal supply voltage in an integrated circuit is provided. The voltage supply circuit comprises a supply source for setting the internal supply voltage on a supply voltage line and a control circuit which is connected to the supply source for switching on and off the supply source. The control circuit can itself be switched off and regularly switched on again, wherein the control circuit includes a control unit in order to switch the supply source on and off in such a way that the internal supply voltage on the supply voltage line differs essentially by no more than a limit value as a result of capacitive charge storage.

    摘要翻译: 提供了一种用于在集成电路中提供内部电源电压的电压供应电路。 电压供给电路包括用于设定电源电压线上的内部电源电压的供给源和与供给源连接的用于接通和关闭供给源的控制电路。 控制电路本身可以被断开并再次定期接通,其中控制电路包括一个控制单元,以便以这样的方式切换供电源,使得电源电压线上的内部电源电压基本上不变 作为电容性电荷存储的结果,超过限制值。

    Semiconductor memory circuit and method for operating the same in a standby mode
    3.
    发明申请
    Semiconductor memory circuit and method for operating the same in a standby mode 有权
    半导体存储器电路及其在待机模式下的操作方法

    公开(公告)号:US20050179461A1

    公开(公告)日:2005-08-18

    申请号:US11032535

    申请日:2005-01-10

    摘要: A semiconductor memory circuit having a controller by means of which the semiconductor memory circuit can be switched into a standby mode with a reduced power requirement, comprises an analog subcircuit having a power input and a signal output and is characterized by the fact that a switching device for feeding electrical power is connected to the power input and the controller is connected to the switching device in such a way that the switching device can be driven by the controller in such a way that the switching device, in the standby mode, supplies the analog subcircuit with electrical power during a first periodically repeated time duration and does not supply it with electrical power during a second periodically repeated time duration.

    摘要翻译: 一种具有控制器的半导体存储器电路,其中半导体存储器电路可以通过其降低功率需求而切换到待机模式,包括具有电源输入和信号输出的模拟子电路,其特征在于开关器件 用于供电的电力被连接到电力输入端,并且控制器以这样的方式连接到开关装置,使得开关装置可以由控制器驱动,使得处于待机模式的开关装置提供模拟 在第一周期性重复持续时间期间具有电力的分支电路,并且在第二周期性重复持续时间期间不提供电力。

    Pseudostatic memory circuit
    4.
    发明授权
    Pseudostatic memory circuit 失效
    伪静态存储器电路

    公开(公告)号:US06909657B2

    公开(公告)日:2005-06-21

    申请号:US10675433

    申请日:2003-09-30

    IPC分类号: G11C11/406 G11C7/00

    摘要: A psuedostatic memory circuit is selected by a memory selection signal. A control circuit, in a first operating mode, carries out a refresh of the memory area at a refresh address after reception of the refresh request signal by generation of a refresh signal if the memory circuit is deselected or if, in the event of selection of the memory circuit by the memory selection signal, the access to the memory area is ended before the generation of a further refresh request signal. The control circuit, in a second operating mode, interrupts an access to the memory area for the writing and read-out of data and carries out a refresh of the memory area by generation of a refresh signal if the memory circuit is selected and a further refresh request signal is received before the ending of the access to the memory area.

    摘要翻译: 通过存储器选择信号选择伪静态存储器电路。 如果取消选择存储器电路,则在第一操作模式中的控制电路在接收到刷新请求信号之后的刷新地址处刷新存储器区域,或者如果在选择 通过存储器选择信号的存储器电路,在生成另外的刷新请求信号之前结束对存储器区域的访问。 在第二操作模式中,控制电路中断对存储器区域的访问以便写入和读出数据,并且如果选择了存储器电路,则通过产生刷新信号来进行存储区域的刷新 在访问存储器区域的结束之前接收到刷新请求信号。

    Integrated charge pump
    5.
    发明授权
    Integrated charge pump 有权
    集成电荷泵

    公开(公告)号:US07323927B2

    公开(公告)日:2008-01-29

    申请号:US11318059

    申请日:2005-12-19

    申请人: Manfred Menke

    发明人: Manfred Menke

    IPC分类号: G05F1/10

    CPC分类号: H02M3/07

    摘要: An integrated charge pump is provided, comprising: a pump capacitor having a first terminal and a second terminal; a control unit, which operates the charge pump in an alternation between a first phase and a second phase; a first switching device in order to charge the pump capacitor with a pump voltage in the first phase; a second switching device in order to pull the potential of the first terminal to a predetermined potential in the second phase, and in order to connect the second terminal of the pump capacitor to an output node, the second switching device having a first transistor in order to connect the second terminal of the pump capacitor to the output node, a substrate terminal of the first transistor being fixedly connected to the output node; and the second switching device pulling the first terminal to the predetermined potential with a gradient, the gradient being chosen such that at no point in time is a diode breakdown voltage exceeded in the first transistor.

    摘要翻译: 提供了一种集成电荷泵,包括:具有第一端子和第二端子的泵电容器; 控制单元,其在第一阶段和第二阶段之间交替地操作所述电荷泵; 第一开关装置,用于在第一相中以泵浦电压对泵电容器充电; 第二开关装置,以便将第一端子的电位拉到第二相中的预定电位,并且为了将泵电容器的第二端子连接到输出节点,第二开关装置按顺序具有第一晶体管 将泵电容器的第二端子连接到输出节点,第一晶体管的基板端子固定地连接到输出节点; 并且所述第二开关器件以梯度将所述第一端子拉到所述预定电位,所述梯度被选择为使得在任何时间点都不是在所述第一晶体管中超过二极管击穿电压。

    Charge pump
    6.
    发明授权
    Charge pump 失效
    电荷泵

    公开(公告)号:US5546296A

    公开(公告)日:1996-08-13

    申请号:US279919

    申请日:1994-07-25

    CPC分类号: G11C5/145 H02M3/073

    摘要: A charge pump assembly includes a storage capacitor having one terminal for a first supply potential and another terminal for pickup of an output potential. The assembly has one charge pump or two charge pumps being controlled by push-pull signals. Each charge pump includes a p-channel MOS transistor having a gate terminal being controlled by a first signal and having a drain-to-source path with one terminal being connected to the other terminal of the storage capacitor. A sliding capacitor has one terminal being connected to the other terminal of the drain-to-source path of the p-channel MOS transistor and another terminal being controlled by a second signal. An n-channel MOS transistor has a gate terminal being controlled by a third signal and a drain-to-source path being connected between a second supply potential and the one terminal of the sliding capacitor. A pulse shaper device is supplied by an oscillator device for generating the signals, in such a way that the p-channel MOS transistor is conducting only whenever the second signal is at a high level, and the n-channel MOS transistor is conducting only whenever the second signal is at a low level.

    摘要翻译: 电荷泵组件包括具有用于第一电源电位的一个端子和用于拾取输出电位的另一端子的存储电容器。 该组件具有一个电荷泵或两个电荷泵由推挽信号控制。 每个电荷泵包括一个p沟道MOS晶体管,其栅极端子由第一个信号控制,并具有一个漏极到源极通路,一个端子连接到存储电容器的另一个端子。 滑动电容器具有一个端子连接到p沟道MOS晶体管的漏极 - 源极通路的另一个端子,另一个端子由第二个信号控制。 n沟道MOS晶体管的栅极端子由第三信号控制,漏极 - 源极路径连接在第二电源电位和滑动电容器的一个端子之间。 脉冲整形器由用于产生信号的振荡器提供,使得只有当第二信号处于高电平时,p沟道MOS晶体管才导通,并且n沟道MOS晶体管仅在 第二信号处于低电平。

    Conductor track configuration for very large-scale integrated circuits
    7.
    发明授权
    Conductor track configuration for very large-scale integrated circuits 失效
    针对非常大型集成电路的导体轨道配置

    公开(公告)号:US5289037A

    公开(公告)日:1994-02-22

    申请号:US883113

    申请日:1992-05-14

    摘要: A conductor track configuration for very large-scale integrated circuits includes at least two lower conductor tracks extending substantially in a first direction and at least two upper conductor tracks extending substantially in the first direction above the lower conductor tracks. Each of the lower conductor tracks is subdivided into segments, defining gaps between the segments. Each respective one of the segments has one contact leading to the upper conductor track disposed above the one segment. The lower conductor tracks adjacent the segments, as seen in a second direction, have one of the gaps at least in the vicinity of one of the contacts.

    摘要翻译: 用于非常大规模的集成电路的导体轨道配置包括至少两个基本上沿第一方向延伸的下部导体轨道和至少两个上部导体轨道,其基本上沿着下部导体轨道的第一方向延伸。 每个下导体轨道被细分成段,限定段之间的间隙。 每个分段中的每一个具有通向设置在一个段上方的上部导体轨迹的一个触点。 至少在其中一个接触点附近,沿着第二方向看到的邻近片段的下导体迹线具有一个间隙。

    Screw capture
    8.
    发明授权
    Screw capture 失效
    螺旋捕获

    公开(公告)号:US4396327A

    公开(公告)日:1983-08-02

    申请号:US194089

    申请日:1980-10-06

    申请人: Manfred Menke

    发明人: Manfred Menke

    IPC分类号: F16B5/02 F16B41/00 F16B37/04

    摘要: A screw is captured in an assembly of concentric sleeves, the inner one of which has a flange, and an outer workpiece is clamped between the flange and the outer sleeve. The outer workpiece has a sufficiently large, beveled bore to permit radial play of the assembly. The outer sleeve has a threaded inner flange at the other end; and the two sleeves are assembled in press fit.

    摘要翻译: 螺钉被捕获在同心套筒的组件中,其内部的一个具有凸缘,并且外部工件被夹紧在凸缘和外部套筒之间。 外部工件具有足够大的斜面孔,以允许组件的径向游隙。 外套筒在另一端具有螺纹内凸缘; 并且两个袖子按压配合组装。

    DENTAL IMPLANT FOR SUPPORTING A DENTAL PROSTHESIS
    9.
    发明申请
    DENTAL IMPLANT FOR SUPPORTING A DENTAL PROSTHESIS 审中-公开
    用于支持牙齿假体的牙科植入物

    公开(公告)号:US20080113316A1

    公开(公告)日:2008-05-15

    申请号:US11876892

    申请日:2007-10-23

    申请人: Manfred Menke

    发明人: Manfred Menke

    IPC分类号: A61C8/00

    摘要: Dental implant (10) for supporting a dental prosthesis on a jaw bone, is equipped with a main body (12), which comprises a securing portion (14) intended to be anchored in the bone tissue and, lying opposite it, a head portion (16). The head portion (16) protrudes radially beyond the securing portion (14) with respect to the longitudinal axis of the main body (12) to form a support face (26), in such a way that, in the state of insertion in the jaw bone, the pressure of the dental implant (10) on the jaw bone is reduced, and a sinking movement of the dental implant (10) into the jaw bone is effectively avoided, even over quite long periods of time.

    摘要翻译: 用于支撑颌骨上的牙科假体的牙种植体(10)装备有主体(12),该主体包括一个固定部分(14),该固定部分将被锚固在骨组织中,并且与其相对置, (16)。 头部(16)相对于主体(12)的纵向轴线径向突出超过固定部分(14)以形成支撑面(26),使得在插入到主体 颌骨上的牙植入物(10)的压力减小,并且即使在相当长的时间段内也能有效地避免牙植入物(10)进入颚骨的下沉运动。

    Semiconductor memory circuit and method for operating the same in a standby mode
    10.
    发明授权
    Semiconductor memory circuit and method for operating the same in a standby mode 有权
    半导体存储器电路及其在待机模式下的操作方法

    公开(公告)号:US07356718B2

    公开(公告)日:2008-04-08

    申请号:US11032535

    申请日:2005-01-10

    IPC分类号: G06F1/26

    摘要: A semiconductor memory circuit having a controller by means of which the semiconductor memory circuit can be switched into a standby mode with a reduced power requirement, comprises an analog subcircuit having a power input and a signal output and is characterized by the fact that a switching device for feeding electrical power is connected to the power input and the controller is connected to the switching device in such a way that the switching device can be driven by the controller in such a way that the switching device, in the standby mode, supplies the analog subcircuit with electrical power during a first periodically repeated time duration and does not supply it with electrical power during a second periodically repeated time duration.

    摘要翻译: 一种具有控制器的半导体存储器电路,其中半导体存储器电路可以通过其降低功率需求而切换到待机模式,包括具有电源输入和信号输出的模拟子电路,其特征在于开关器件 用于供电的电力被连接到电力输入端,并且控制器以这样的方式连接到开关装置,使得开关装置可以由控制器驱动,使得处于待机模式的开关装置提供模拟 在第一周期性重复持续时间期间具有电力的分支电路,并且在第二周期性重复持续时间期间不提供电力。