摘要:
A semiconductor dynamic random access memory (DRAM) 300 with a programmable memory refresh counter 345 is presented. The counter 345 permits the specification of portions of the DRAM 300 to be refreshed, saving power and time over DRAMs that refresh the entire memory. The counter 345 may be programmed with a wordline address at the beginning of a block of memory and subsequent refresh operations automatically increment or decrement the value in the counter. Additionally, blocks of the memory not being refreshed can be accessed (written or read), improving the utilization of the memory device.
摘要:
A voltage supply circuit for providing an internal supply voltage in an integrated circuit is provided. The voltage supply circuit comprises a supply source for setting the internal supply voltage on a supply voltage line and a control circuit which is connected to the supply source for switching on and off the supply source. The control circuit can itself be switched off and regularly switched on again, wherein the control circuit includes a control unit in order to switch the supply source on and off in such a way that the internal supply voltage on the supply voltage line differs essentially by no more than a limit value as a result of capacitive charge storage.
摘要:
A semiconductor memory circuit having a controller by means of which the semiconductor memory circuit can be switched into a standby mode with a reduced power requirement, comprises an analog subcircuit having a power input and a signal output and is characterized by the fact that a switching device for feeding electrical power is connected to the power input and the controller is connected to the switching device in such a way that the switching device can be driven by the controller in such a way that the switching device, in the standby mode, supplies the analog subcircuit with electrical power during a first periodically repeated time duration and does not supply it with electrical power during a second periodically repeated time duration.
摘要:
A psuedostatic memory circuit is selected by a memory selection signal. A control circuit, in a first operating mode, carries out a refresh of the memory area at a refresh address after reception of the refresh request signal by generation of a refresh signal if the memory circuit is deselected or if, in the event of selection of the memory circuit by the memory selection signal, the access to the memory area is ended before the generation of a further refresh request signal. The control circuit, in a second operating mode, interrupts an access to the memory area for the writing and read-out of data and carries out a refresh of the memory area by generation of a refresh signal if the memory circuit is selected and a further refresh request signal is received before the ending of the access to the memory area.
摘要:
An integrated charge pump is provided, comprising: a pump capacitor having a first terminal and a second terminal; a control unit, which operates the charge pump in an alternation between a first phase and a second phase; a first switching device in order to charge the pump capacitor with a pump voltage in the first phase; a second switching device in order to pull the potential of the first terminal to a predetermined potential in the second phase, and in order to connect the second terminal of the pump capacitor to an output node, the second switching device having a first transistor in order to connect the second terminal of the pump capacitor to the output node, a substrate terminal of the first transistor being fixedly connected to the output node; and the second switching device pulling the first terminal to the predetermined potential with a gradient, the gradient being chosen such that at no point in time is a diode breakdown voltage exceeded in the first transistor.
摘要:
A charge pump assembly includes a storage capacitor having one terminal for a first supply potential and another terminal for pickup of an output potential. The assembly has one charge pump or two charge pumps being controlled by push-pull signals. Each charge pump includes a p-channel MOS transistor having a gate terminal being controlled by a first signal and having a drain-to-source path with one terminal being connected to the other terminal of the storage capacitor. A sliding capacitor has one terminal being connected to the other terminal of the drain-to-source path of the p-channel MOS transistor and another terminal being controlled by a second signal. An n-channel MOS transistor has a gate terminal being controlled by a third signal and a drain-to-source path being connected between a second supply potential and the one terminal of the sliding capacitor. A pulse shaper device is supplied by an oscillator device for generating the signals, in such a way that the p-channel MOS transistor is conducting only whenever the second signal is at a high level, and the n-channel MOS transistor is conducting only whenever the second signal is at a low level.
摘要:
A conductor track configuration for very large-scale integrated circuits includes at least two lower conductor tracks extending substantially in a first direction and at least two upper conductor tracks extending substantially in the first direction above the lower conductor tracks. Each of the lower conductor tracks is subdivided into segments, defining gaps between the segments. Each respective one of the segments has one contact leading to the upper conductor track disposed above the one segment. The lower conductor tracks adjacent the segments, as seen in a second direction, have one of the gaps at least in the vicinity of one of the contacts.
摘要:
A screw is captured in an assembly of concentric sleeves, the inner one of which has a flange, and an outer workpiece is clamped between the flange and the outer sleeve. The outer workpiece has a sufficiently large, beveled bore to permit radial play of the assembly. The outer sleeve has a threaded inner flange at the other end; and the two sleeves are assembled in press fit.
摘要:
Dental implant (10) for supporting a dental prosthesis on a jaw bone, is equipped with a main body (12), which comprises a securing portion (14) intended to be anchored in the bone tissue and, lying opposite it, a head portion (16). The head portion (16) protrudes radially beyond the securing portion (14) with respect to the longitudinal axis of the main body (12) to form a support face (26), in such a way that, in the state of insertion in the jaw bone, the pressure of the dental implant (10) on the jaw bone is reduced, and a sinking movement of the dental implant (10) into the jaw bone is effectively avoided, even over quite long periods of time.
摘要:
A semiconductor memory circuit having a controller by means of which the semiconductor memory circuit can be switched into a standby mode with a reduced power requirement, comprises an analog subcircuit having a power input and a signal output and is characterized by the fact that a switching device for feeding electrical power is connected to the power input and the controller is connected to the switching device in such a way that the switching device can be driven by the controller in such a way that the switching device, in the standby mode, supplies the analog subcircuit with electrical power during a first periodically repeated time duration and does not supply it with electrical power during a second periodically repeated time duration.