Method for forming minimally spaced MRAM structures
    6.
    发明授权
    Method for forming minimally spaced MRAM structures 有权
    用于形成最小间隔MRAM结构的方法

    公开(公告)号:US06682943B2

    公开(公告)日:2004-01-27

    申请号:US09842783

    申请日:2001-04-27

    IPC分类号: H01G706

    CPC分类号: H01L27/222

    摘要: A method of forming minimally spaced MRAM structures is disclosed. A photolithography technique is employed to define masking patterns, on the sidewalls of which spacers are subsequently formed to reduce the distance between any of the two adjacent masking patterns. A filler material is next used to fill in the space around the masking patterns and to form filler plugs. The masking patterns and the spacers are removed using the filler plugs as a hard mask. Digit and word lines of MRAM structures are subsequently formed.

    摘要翻译: 公开了一种形成最小间隔MRAM结构的方法。 使用光刻技术来定义掩模图案,其侧壁上随后形成间隔物以减少两个相邻掩模图案中的任一个之间的距离。 填充材料接下来用于填充掩模图案周围的空间并形成填充塞。 使用填充塞作为硬掩模去除掩模图案和间隔物。 随后形成MRAM结构的数字和字线。

    Minimally spaced MRAM structures
    7.
    发明授权
    Minimally spaced MRAM structures 有权
    最小间隔的MRAM结构

    公开(公告)号:US06750069B2

    公开(公告)日:2004-06-15

    申请号:US10454479

    申请日:2003-06-05

    IPC分类号: H01L21336

    CPC分类号: H01L27/222 B82Y10/00

    摘要: A method of forming minimally spaced apart MRAM structures is disclosed. A photolithography technique is employed to define patterns an integrated circuit, the width of which is further reduced by etching to allow formation of patterns used to etch digit line regions with optimum critical dimension between any of the two digit line regions. Subsequent pinned and sense layers of MRAM structures are formed over the minimally spaced digit regions.

    摘要翻译: 公开了形成最小间隔的MRAM结构的方法。 使用光刻技术来定义集成电路的图案,其集成电路的宽度通过蚀刻进一步减小,以允许形成用于蚀刻具有两个数字线区域中的任一个之间的最佳临界尺寸的数字线区域的图案。 在最小间隔的数字区域上形成随后的MRAM结构的固定和感测层。

    Minimally spaced MRAM structures
    8.
    发明授权
    Minimally spaced MRAM structures 有权
    最小间隔的MRAM结构

    公开(公告)号:US06885051B2

    公开(公告)日:2005-04-26

    申请号:US10823553

    申请日:2004-04-14

    CPC分类号: H01L27/222 B82Y10/00

    摘要: A method of forming minimally spaced apart MRAM structures is disclosed. A photolithography technique is employed to define patterns an integrated circuit, the width of which is further reduced by etching to allow formation of patterns used to etch digit line regions with optimum critical dimension between any of the two digit line regions. Subsequent pinned and sense layers of MRAM structures are formed over the minimally spaced digit regions.

    摘要翻译: 公开了形成最小间隔的MRAM结构的方法。 使用光刻技术来定义集成电路的图案,其集成电路的宽度通过蚀刻进一步减小,以允许形成用于蚀刻具有两个数字线区域中的任一个之间的最佳临界尺寸的数字线区域的图案。 在最小间隔的数字区域上形成随后的MRAM结构的固定和感测层。

    Method for forming minimally spaced MRAM structures
    9.
    发明授权
    Method for forming minimally spaced MRAM structures 有权
    用于形成最小间隔MRAM结构的方法

    公开(公告)号:US06689661B2

    公开(公告)日:2004-02-10

    申请号:US09828823

    申请日:2001-04-10

    IPC分类号: H01L21336

    CPC分类号: H01L27/222 B82Y10/00

    摘要: A method of forming minimally spaced apart MRAM structures is disclosed. A photolithography technique is employed to define patterns an integrated circuit, the width of which is further reduced by etching to allow formation of patterns used to etch digit line regions with optimum critical dimension between any of the two digit line regions. Subsequent pinned and sense layers of MRAM structures are formed over the minimally spaced digit regions.

    摘要翻译: 公开了形成最小间隔的MRAM结构的方法。 使用光刻技术来定义集成电路的图案,其集成电路的宽度通过蚀刻进一步减小,以允许形成用于蚀刻具有两个数字线区域中的任一个之间的最佳临界尺寸的数字线区域的图案。 在最小间隔的数字区域上形成随后的MRAM结构的固定和感测层。

    Fuse, memory incorporating same and method

    公开(公告)号:US6130468A

    公开(公告)日:2000-10-10

    申请号:US21968

    申请日:1998-02-11

    摘要: A method of making a fuse and a fuse, together with systems and integrated circuits where the fuse provides benefits, are described. A fuse comprising a conductive material is formed on a substrate. A series of dielectric layers having a composite thickness is formed on the substrate and the fuse. The series of dielectric layers serves to insulate a series of conductive layers from each other. The conductive layers are disposed above portions of the substrate. An opening is formed extending through a passivation layer and the series of dielectric layers. The opening exposes a portion of the fuse. Another dielectric layer is formed on the fuse and the fuse may thereafter be programmed by directing a laser beam onto the fuse through the opening.