摘要:
The present invention relates to a method for merging regions in the image/video, capable of merging plural of image regions into an image merging region. In the disclosed method, these image regions are first sequenced basing on their compactness value. Then, one of these image regions is designated as a reference image region, and a merging test process is executed by merging the reference image region with one of the nearby image regions thereof in sequence, for forming a temporal image merging region. Later, the compactness value of the temporal image merging region is compared with the compactness value of the two consisting image regions thereof, respectively. When the compactness value of the temporal image merging region is larger than either one of the compactness value of the two consisting image regions thereof, the temporal image merging region is designated as an image merging region.
摘要:
A method for depth map generation is disclosed, capable of generating a depth map corresponding an image signal, for the application of a 2D to 3D image transformation system. In the depth map generated by the disclosed method, each of the plural image regions of the image signal is assigned with a depth value. Besides, by means of comparing the depth map with another depth map of the earlier time point, the disclosed method can generate a modulated depth map, for assigning a depth value to each of the plural image regions of the image signal more precisely. Thus, the transformation performance and efficiency of the 2D to 3D image transformation system are hereby improved.
摘要:
A multiplexing circuit includes first and second tri-state inverters coupled to first and second data input nodes, respectively. The first and second tri-state inverters include first and second stacks of transistors, respectively, coupled between power supply and ground nodes. Each stack includes first and second PMOS transistors and first and second NMOS transistors. The first and second stacks include first and second dummy transistors, respectively.
摘要:
A method for chemical-mechanical polishing two adjacent structures of a semiconductor device is provided. The method for mechanical polishing comprising: (a) providing a semiconductor device comprising a recess formed in a surface thereof, a first layer formed over the surface, and a second layer filled with the recess and formed on the first layer; and (b) substantially polishing the first and second layer with a pad and a substantially inhibitor-free slurry, wherein the pad comprising a corrosion inhibitor of the second layer.
摘要:
An antenna cell for preventing plasma enhanced gate dielectric failures, is provided. The antenna cell design utilizes a polysilicon lead as a gate for a dummy transistor. The polysilicon lead may be one of a group of parallel, nested polysilicon lead. The dummy transistor includes the gate coupled to a substrate maintained at VSS, either directly through a metal lead or indirectly through a tie-low cell. The gate is disposed over a dielectric disposed over a continuous source/drain region in which the source and drain are tied together. A diode is formed with the semiconductor substrate within which it is formed. The source/drain region is coupled to another metal lead which may be an input pin and is coupled to active transistor gates, preventing plasma enhanced gate dielectric damage to the active transistors.