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公开(公告)号：US20200049839A1
公开(公告)日：2020-02-13
申请号：US16460282
申请日：2019-07-02
发明人： Miao ZHANG , Wuxia FU , Songmei SUN , Ran ZHANG
IPC分类号： G01T1/24 , H01L27/146
摘要： A detector pixel, an array substrate, an apparatus and a method for detecting an intensity of a ray are provided. The detector pixel includes substrate, first transistor, second transistor, storage capacitor, photosensitive element, first control line, second control line, first data line and second data line. The first and the second transistors are dual-gate transistors; the first transistor has a bottom gate connected to the first control line, a top gate connected to the second control line, a first electrode connected to the storage capacitor, and a second electrode connected to the first data line; the second transistor has a bottom gate connected to the second control line, a top gate connected to the first control line, a first electrode connected to the storage capacitor, and a second electrode connected to the second data line; and the storage capacitor is connected to the photosensitive element.
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公开(公告)号：US20190156778A1
公开(公告)日：2019-05-23
申请号：US15772677
申请日：2017-09-15
发明人： Meng LI , Yongqian LI , Pan XU , Miao ZHANG
摘要： The present application provides a shift register circuit, a gate driving circuit including the shift register circuit, and a driving method applied to the shift register circuit. The shift register circuit includes an input sub-circuit, an output sub-circuit, an output reset sub-circuit, and a first capacitor, wherein the first capacitor is connected between the pull-up node and the second clock signal terminal, and configured to maintain a high level at the pull-up node through the second clock signal input at the second clock signal terminal. The shift register circuit further includes a second capacitor connected between the pull-down node and a first voltage input terminal, and configured to pull down a level at the pull-down node through a reverse bias voltage input at the first voltage input terminal during a blanking time after a frame of scanning ends.
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公开(公告)号：US20170263184A1
公开(公告)日：2017-09-14
申请号：US15310227
申请日：2016-03-01
发明人： Mo CHEN , Jian ZHAO , Miao ZHANG , Jing SUN , Songmei SUN
IPC分类号： G09G3/3258 , G09G3/3291 , G09G3/3266
CPC分类号： G09G3/3258 , G09G3/3233 , G09G3/3266 , G09G3/3291 , G09G2300/043 , G09G2300/0809 , G09G2300/0852 , G09G2310/0262 , G09G2320/043 , G09G2320/0646
摘要： The present disclosure provides a pixel driver circuit, a pixel circuit, a display panel and a display device. The pixel driver circuit includes two pixel driving units having an identical structure. Each pixel driving unit includes a driving transistor and a driving control module. A gate electrode of the driving transistor is connected to the driving control module, a first electrode thereof receives a first power voltage, and a second electrode thereof is connected to the driving control module and a light-emitting element. The driving control module is connected to a data line, a gate line, and the gate electrode and the second electrode of the driving transistor, and controls a potential at the gate electrode of the driving transistor in accordance with a data voltage applied to the data line under control of a gate driving signal from the gate line, so as to turn on/off the driving transistor.
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公开(公告)号：US20210335317A1
公开(公告)日：2021-10-28
申请号：US16609802
申请日：2019-04-29
发明人： Jinliang LIU , Miao ZHANG , Wuxia FU
摘要： Provided are shift register, driving method thereof, gate driving circuit and display device. The shift register includes input circuit, pull-up circuit, reset circuit, at least one noise reduction circuit, and at least one pull-down node control circuit. At least one pull-down node control circuit is coupled to at least one pull-down node, low voltage signal terminal, and reset signal terminal, and configured to control voltage level of at least one pull-down node according to signal of reset signal terminal. At least one pull-down node control circuit controls level of at least one pull-down node to second level higher than or equal to on level in response to signal of reset signal terminal having on level, and controls voltage level of at least one pull-down node to third level between on level and first level in response to signal of reset signal terminal transitioning from on level to off level.
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公开(公告)号：US20210210012A1
公开(公告)日：2021-07-08
申请号：US15778404
申请日：2017-12-07
发明人： Miao ZHANG , Mo CHEN , Jing SUN , Wuxia FU
IPC分类号： G09G3/3233
摘要： A pixel circuit, a method thereof, an electroluminescent panel, and a display device are provided. The pixel circuit includes a first switch sub-circuit, a second switch sub-circuit, a luminescent sub-circuit, and a dual-drive sub-circuit. Through improving the pixel circuit, a first driving terminal of the dual-drive sub-circuit connects to a first node, a second driving terminal of the dual-drive sub-circuit connects to the second node, when a first and a second gate line signal terminal input the gate line scanning signal alternatively, the first and the second switch sub-circuit are working alternatively, cause the first and the second driving terminal are working alternatively, thus to drive the luminescent sub-circuit to emit light. Therefore, the two driving terminals work alternatively to avoid the voltage instability due to threshold voltage shift caused by one driving terminal of the dual-drive sub-circuit works for a long time.
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公开(公告)号：US20210209993A1
公开(公告)日：2021-07-08
申请号：US16064834
申请日：2017-12-05
发明人： Jing SUN , Jinliang LIU , Jian ZHAO , Miao ZHANG
IPC分类号： G09G3/20
摘要： The present application provides shift register, gate driver-on-array circuit and driving method thereof, display device. The shift register includes input sub-circuit, output sub-circuit and step-down sub-circuit. The input sub-circuit is configured to, in input stage, charge pull-up node to first voltage level based on signal input from signal input terminal. The output sub-circuit is configured to, in output stage, pull up voltage level at pull-up node to second voltage level. The step-down sub-circuit is configured to, in output stage, pull down voltage level at pull-up node from second voltage level to third voltage level after voltage level at pull-up node is pulled up to second voltage level. The output sub-circuit is further configured to, in output stage, output first clock signal input from first clock signal input terminal through signal output terminal under control of pull-up node.
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公开(公告)号：US20200219959A1
公开(公告)日：2020-07-09
申请号：US16711667
申请日：2019-12-12
发明人： Jingang FANG , Luke DING , Bin ZHOU , Miao ZHANG
摘要： A display substrate, a method for fabricating the same, and a display panel are provided. The display substrate includes: a substrate, and a first conductive layer, at least two insulation layers, and a second conductive layer, the second conductive layer being electrically connected with the first conductive layer through via-holes, and the at least two insulation layers including a first insulation layer in contact with the first conductive layer, wherein the display substrate further includes an assisting alignment structure on the surface of the first insulation layer, and the orthographic projection of the assisting alignment structure surrounds at least part of the edge of the orthographic projection of the first via-hole in the first insulation layer on the substrate, so that the orthographic projection of the first via-hole on the first conductive layer lies within the pattern of the first conductive layer.
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公开(公告)号：US20180358273A1
公开(公告)日：2018-12-13
申请号：US15573067
申请日：2017-05-05
发明人： Miao ZHANG , Jing SUN , Wuxia FU
CPC分类号： H01L22/32 , G01N27/041 , G01R31/2886 , H01L22/14 , H01L22/34 , H01L27/12 , H01L27/124
摘要： A film test structure and an array substrate are provided. The film test structure includes a conductive film to be tested; a plurality of test leads arranged at a different layer from the conductive film to be tested and electrically connected with the conductive film to be tested respectively; and a plurality of test terminals electrically connected with the plurality of test leads respectively.
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公开(公告)号：US20240049539A1
公开(公告)日：2024-02-08
申请号：US18490147
申请日：2023-10-19
发明人： Jingang FANG , Luke DING , Bin ZHOU , Miao ZHANG
IPC分类号： H10K59/131 , H10K50/84 , H10K59/126
CPC分类号： H10K59/131 , H10K50/84 , H10K59/126 , H10K2102/00
摘要： A display substrate, a method for fabricating the same, and a display panel are provided. The display substrate includes: a substrate, and a first conductive layer, at least two insulation layers, and a second conductive layer, the second conductive layer being electrically connected with the first conductive layer through via-holes, and the at least two insulation layers including a first insulation layer in contact with the first conductive layer, wherein the display substrate further includes an assisting alignment structure on the surface of the first insulation layer, and the orthographic projection of the assisting alignment structure surrounds at least part of the edge of the orthographic projection of the first via-hole in the first insulation layer on the substrate, so that the orthographic projection of the first via-hole on the first conductive layer lies within the pattern of the first conductive layer.
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