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公开(公告)号：US20240395201A1
公开(公告)日：2024-11-28
申请号：US18272811
申请日：2022-07-29
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN , Liu WU , Xiuting LIU , Luke DING , Cheng XU , Miao LIU , Xing YAO
IPC: G09G3/3233 , G11C19/28 , H10K59/131
Abstract: A display substrate and a display apparatus. The display substrate includes a display area provided with pixel circuits arranged in an array and a non-display area provided with M light emitting driving circuits, M control driving circuits and M reset driving circuits. Odd-numbered light emitting driving circuits are electrically connected with first and second light emitting clock signal lines, and even-numbered light emitting driving circuits are connected with third and fourth light emitting clock signal lines; and/or, odd-numbered control driving circuits are electrically connected with first and second control clock signal lines, and even-numbered control driving circuits are connected with third and fourth control clock signal lines; and/or, odd-numbered reset driving circuits are electrically connected with first and second reset clock signal lines, and even-numbered reset driving circuits are connected with third and fourth reset clock signal lines.
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公开(公告)号：US20210066352A1
公开(公告)日：2021-03-04
申请号：US16919903
申请日：2020-07-02
Inventor： Leilei CHENG , Bin ZHOU , Jun LIU , Luke DING , Qinghe WANG , Yongchao HUANG
IPC: H01L27/12 , G02F1/1333 , G02F1/1362
Abstract: An array substrate includes an insulation layer and one or more stepped holes each penetrating through the insulation layer in a direction perpendicular to the insulation layer. Each stepped hole includes a first hole and a second hole under the first hole, a radius of the first hole at a bottom is a first radius, a radius of the second hole at a top is a second radius which is substantially smaller than the first radius, and a difference between the first radius and the second radius is 0.2 μm to 0.6 μm.
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公开(公告)号：US20200035716A1
公开(公告)日：2020-01-30
申请号：US16396726
申请日：2019-04-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Bin ZHOU , Binbin CAO , Liangchen YAN , Dongfang WANG , Ce ZHAO , Luke DING , Jun LIU
IPC: H01L27/12
Abstract: The present disclosure is in the field of display technologies, and provides an array substrate including an IGZO film layer, a gate layer, and a gate insulating layer. The gate layer is provided with broken lines at a position thereof overlapping the IGZO film layer to form a first gate line and a second gate line. The gate insulating layer is disposed between the IGZO film layer and the gate layer, and is provided with at least two through holes thereon, in which the first gate line is connected with the IGZO film layer through one of the through holes, and the second gate line is connected with the IGZO film layer through another through hole, thus, connecting the IGZO film layer in series into the gate layer.
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公开(公告)号：US20250104626A1
公开(公告)日：2025-03-27
申请号：US18558500
申请日：2022-10-28
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN , Cheng XU , Dacheng ZHANG , Dandan ZHOU , Liu WU , Luke DING , Xiuting LIU
IPC: G09G3/3233 , G09G3/32
Abstract: A display substrate and a display device. The display substrate includes a driving circuit layer, a first scanning line and a second scanning line. The driving circuit layer includes pixel units arranged in an array form, each pixel unit includes a plurality of sub-pixels, at least one sub-pixel includes a pixel driving circuit, the pixel driving circuit includes a first transistor and a second transistor, an active pattern of the first transistor includes a first channel region, an active pattern of the second transistor includes a second channel region, the first channel region is located on a side of the first scanning line away from the second scanning line, and the second channel region is located on a side of the second scanning line away from the first scanning line.
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公开(公告)号：US20240365615A1
公开(公告)日：2024-10-31
申请号：US18765377
申请日：2024-07-08
Inventor： Luke DING , Yongqian LI
IPC: H10K59/131 , G09G3/3233 , H10K59/12 , H10K59/124
CPC classification number: H10K59/131 , G09G3/3233 , H10K59/1201 , H10K59/124 , G09G2300/0819 , G09G2300/0842 , G09G2310/08
Abstract: A display substrate and a preparation method therefor, and a display apparatus. The display substrate includes a base substrate, and a display area and a mounting area provided on the base substrate; the display area includes multiple second pixel circuits, the mounting area includes multiple first pixel circuits, and an area of an orthographic projection of a first pixel circuit on the base substrate is smaller than an area of an orthographic projection of a second pixel circuit on the base substrate.
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Patent Agency Ranking
公开(公告)号：US20200219959A1
公开(公告)日：2020-07-09
申请号：US16711667
申请日：2019-12-12
Applicant: BOE Technology Group Co., Ltd.
Inventor： Jingang FANG , Luke DING , Bin ZHOU , Miao ZHANG
Abstract: A display substrate, a method for fabricating the same, and a display panel are provided. The display substrate includes: a substrate, and a first conductive layer, at least two insulation layers, and a second conductive layer, the second conductive layer being electrically connected with the first conductive layer through via-holes, and the at least two insulation layers including a first insulation layer in contact with the first conductive layer, wherein the display substrate further includes an assisting alignment structure on the surface of the first insulation layer, and the orthographic projection of the assisting alignment structure surrounds at least part of the edge of the orthographic projection of the first via-hole in the first insulation layer on the substrate, so that the orthographic projection of the first via-hole on the first conductive layer lies within the pattern of the first conductive layer.
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7.发明申请THIN FILM TRANSISTOR AND METHOD OF FABRICATING THE SAME, ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME, AND DISPLAY DEVICE 有权薄膜晶体管及其制造方法，阵列基板及其制造方法以及显示装置公开(公告)号：US20150340455A1
公开(公告)日：2015-11-26
申请号：US14376028
申请日：2013-11-27
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Zhanfeng CAO , Qi YAO , Luke DING , Bing SUN , Xiangchun KONG
IPC: H01L29/423 , H01L29/51 , H01L29/786 , H01L29/49 , G02F1/1368 , H01L27/12
CPC classification number: H01L29/42364 , G02F1/1368 , H01L27/1225 , H01L27/124 , H01L29/4908 , H01L29/517 , H01L29/78606 , H01L29/7869 , H01L2029/42388
Abstract: The present invention provides a thin film transistor and a method of fabricating the thin film transistor, an array substrate and a method of fabricating the array substrate, and a display device. The thin film transistor includes a substrate and a gate, an insulation layer, an active layer, a source and a drain which are provided on the substrate. A spacer layer is also provided between the gate and the active layer, and the spacer layer overlaps at least with one of the gate and the active layer having a smaller area in an orthographic projection direction. The spacer layer can effectively prevent material forming the gate from being diffused into the active layer, thereby ensuring stability of performance of the thin film transistor. In the array substrate utilizing the thin film transistor, the spacer layer further extends to a region corresponding to a gate line.
Abstract translation: 本发明提供一种薄膜晶体管和制造薄膜晶体管的方法，阵列基板和制造阵列基板的方法以及显示装置。 薄膜晶体管包括设置在基板上的基板和栅极，绝缘层，有源层，源极和漏极。 间隔层还设置在栅极和有源层之间，并且间隔层至少与栅极和有源层中的一个重叠，在正投影方向上具有较小的面积。 间隔层可以有效地防止形成栅极的材料扩散到有源层中，从而确保薄膜晶体管的性能的稳定性。 在利用薄膜晶体管的阵列基板中，间隔层进一步延伸到对应于栅极线的区域。
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公开(公告)号：US20250014520A1
公开(公告)日：2025-01-09
申请号：US18272595
申请日：2022-07-28
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN , Liu WU , Luke DING , Cheng XU , Miao LIU , Xing YAO
IPC: G09G3/3266 , G11C19/28
Abstract: Provided is a gate driver circuit. The gate driver circuit is applicable to a display panel, wherein the display panel includes a plurality of rows of pixels; the gate driver circuit including at least one gate driver sub-circuit; wherein the gate driver sub-circuit includes: at least two shift register groups, wherein each shift register group includes a plurality of shift register units; at least two first dummy units, wherein the at least two first dummy units are respectively coupled to a same input enable terminal and the at least two shift register groups; and at least two second dummy units, wherein the at least two second dummy units are coupled to the at least two shift register groups.
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公开(公告)号：US20240365608A1
公开(公告)日：2024-10-31
申请号：US18028944
申请日：2022-06-24
Inventor： Jingang FANG , Luke DING
IPC: H10K59/131 , H10K59/121
CPC classification number: H10K59/131 , H10K59/1216
Abstract: Provided is drive backplane. The drive backplane includes: a substrate, including a plurality of light transmitting regions and a plurality of sub-pixel regions; a pixel drive circuit and an anode block that are disposed in the sub-pixel region, the pixel drive circuit being electrically connected to the anode block; and repair lines and repair electrodes that are disposed in the light transmitting regions, an end of the repair line being spaced from the repair electrode; wherein, an end, departing from the repair electrode, of the repair line is electrically connected to the anode block in a first sub-pixel region, the repair electrode is electrically connected to the anode block in a second sub-pixel region.
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公开(公告)号：US20240078978A1
公开(公告)日：2024-03-07
申请号：US18262124
申请日：2022-08-05
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN , Luke DING
IPC: G09G3/3266 , G09G3/3233 , G09G3/3275 , H10K59/12 , H10K59/121 , H10K59/131 , H10K59/38
CPC classification number: G09G3/3266 , G09G3/3233 , G09G3/3275 , H10K59/1201 , H10K59/1213 , H10K59/1216 , H10K59/1315 , H10K59/38 , G09G2300/0842
Abstract: A display substrate including a base substrate and a plurality of pixel units on the base substrate. Each pixel unit includes: a plurality of sub-pixels and at least one scanning line. The plurality of sub-pixels are arranged sequentially in a first direction, each sub-pixels includes a sub-pixel driving circuit and a light-emitting element, and the sub-pixel driving circuit is coupled to the light-emitting element. Each scanning line includes a first scanning conductive layer and a second scanning conductive layer arranged in a laminated manner, the first scanning conductive layer is coupled to the second scanning conductive layer, the first scanning conductive layer includes at least a portion extending in the first direction, and the first scanning conductive layer is coupled to a plurality of sub-pixel driving circuits in the plurality of sub-pixels.
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