公开(公告)号：US11210252B1

公开(公告)日：2021-12-28

申请号：US16896863

申请日：2020-06-09

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Naysen J. Robertson ,  Robert L. Noonan ,  David F. Heinrich

IPC: G06F13/40 ,  G06F13/368 ,  G06F13/16 ,  G06F9/54 ,  G06F9/46 ,  G06F9/48

Abstract: A processor executes firmware to write control data describing transfer descriptors for a bus protocol engine to an address that is associated with a transfer descriptor buffer for the bus protocol engine. The bus protocol engine performs an operation according to the transfer descriptors with a slave device; the processor is part of a first semiconductor package; the bus protocol engine is part of a second semiconductor package other than the first semiconductor package; and the address corresponds to a memory of the second semiconductor package. A first physical interface of the first semiconductor package communicates with a second physical interface of the second semiconductor package to direct the control data to the memory.

公开(公告)号：US20180239728A1

公开(公告)日：2018-08-23

申请号：US15436015

申请日：2017-02-17

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Theodore F. Emerson ,  David F. Heinrich ,  Richard Wei Chieh Yu ,  Robert L. Noonan ,  Christopher J. Frantz ,  Sze Hau Loh

IPC: G06F13/38 ,  G06F9/455 ,  G06F13/42 ,  G06F13/28

CPC classification number: G06F13/385 ,  G06F9/4411 ,  G06F9/455 ,  G06F13/105 ,  G06F13/28 ,  G06F13/426 ,  G06F13/4282 ,  G06F2213/0042

Abstract: Various examples described herein provide for a management controller that includes a virtual universal serial bus (USB) host controller that can emulate an actual USB host controller to a central processor. A particular endpoint from a number of endpoints is associated with a virtual USB device that is coupled to the virtual USB host controller. The particular endpoint is to refer to a location in a management memory.

公开(公告)号：US20230134324A1

公开(公告)日：2023-05-04

申请号：US17452722

申请日：2021-10-28

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Theodore F. Emerson ,  Shiva R. Dasari ,  Luis E. Luciani, JR. ,  Kevin E. Boyum ,  Naysen J. Robertson ,  Robert L. Noonan ,  Christopher M. Wesneski ,  David F. Heinrich

IPC: G06F21/78 ,  G06F21/60 ,  G06F21/33 ,  G06F21/53

Abstract: An apparatus includes a host and a baseboard management controller. The baseboard management controller includes a semiconductor package; and the semiconductor package includes a memory, a security hardware processor; and a main hardware processor. The main hardware processor causes the baseboard management controller to serve as an agent that, independently from the host, responds to communications with a remote management entity to manage the host. The security hardware processor manages the storage of a secret of the host in the memory.

公开(公告)号：US10474606B2

公开(公告)日：2019-11-12

申请号：US15436015

申请日：2017-02-17

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Theodore F. Emerson ,  David F. Heinrich ,  Richard Wei Chieh Yu ,  Robert L. Noonan ,  Christopher J. Frantz ,  Sze Hau Loh

IPC: G06F13/38 ,  G06F9/455 ,  G06F13/42 ,  G06F13/28 ,  G06F13/10 ,  G06F9/4401

Abstract: Various examples described herein provide for a management controller that includes a virtual universal serial bus (USB) host controller that can emulate an actual USB host controller to a central processor. A particular endpoint from a number of endpoints is associated with a virtual USB device that is coupled to the virtual USB host controller. The particular endpoint is to refer to a location in a management memory.

公开(公告)号：US20240232110A1

公开(公告)日：2024-07-11

申请号：US18151559

申请日：2023-01-09

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Sukhamoy Som ,  Robert L. Noonan ,  Theodore F. Emerson

IPC: G06F13/36 ,  G06F13/16 ,  G06F13/42

CPC classification number: G06F13/36 ,  G06F13/1678 ,  G06F13/4256

Abstract: In some examples, a management controller is to dynamically vary a parameter that controls an operational characteristic of a bus when transferring different portions of information from a memory over the bus during a process of an electronic device in which a cryptographic operation is performed. The different portions of the information from the memory are to be transferred over the bus with different operational characteristics of the bus.

公开(公告)号：US20240411938A1

公开(公告)日：2024-12-12

申请号：US18813462

申请日：2024-08-23

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Theodore F. Emerson ,  Shiva R. Dasari ,  Luis E. Luciani, JR. ,  Kevin E. Boyum ,  Naysen J. Robertson ,  Robert L. Noonan ,  Christopher M. Wesneski ,  David F. Heinrich

IPC: G06F21/78 ,  G06F21/33 ,  G06F21/53 ,  G06F21/60

Abstract: An apparatus includes a host and a baseboard management controller. The baseboard management controller includes a semiconductor package; and the semiconductor package includes a memory, a security hardware processor; and a main hardware processor. The main hardware processor causes the baseboard management controller to serve as an agent that, independently from the host, responds to communications with a remote management entity to manage the host. The security hardware processor manages the storage of a secret of the host in the memory.

公开(公告)号：US20240411883A1

公开(公告)日：2024-12-12

申请号：US18456846

申请日：2023-08-28

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Sukhamoy Som ,  Robert L. Noonan ,  Theodore F. Emerson

IPC: G06F21/56 ,  G06F21/55

Abstract: In some examples, a security processor detects a potential attack in a system. In response to detecting the potential attack in the system, the security processor issues a command block indication to block processing of commands to access a nonvolatile memory. The security processor determines, based on monitored information, a likelihood of the potential attack being a real attack, and in response to the determined likelihood, triggers an erase of the nonvolatile memory.

公开(公告)号：US12105859B2

公开(公告)日：2024-10-01

申请号：US17452722

申请日：2021-10-28

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Theodore F. Emerson ,  Shiva R. Dasari ,  Luis E. Luciani, Jr. ,  Kevin E. Boyum ,  Naysen J. Robertson ,  Robert L. Noonan ,  Christopher M. Wesneski ,  David F. Heinrich

IPC: G06F21/78 ,  G06F21/33 ,  G06F21/53 ,  G06F21/60

CPC classification number: G06F21/78 ,  G06F21/33 ,  G06F21/53 ,  G06F21/602

Abstract: An apparatus includes a host and a baseboard management controller. The baseboard management controller includes a semiconductor package; and the semiconductor package includes a memory, a security hardware processor; and a main hardware processor. The main hardware processor causes the baseboard management controller to serve as an agent that, independently from the host, responds to communications with a remote management entity to manage the host. The security hardware processor manages the storage of a secret of the host in the memory.

公开(公告)号：US20210382841A1

公开(公告)日：2021-12-09

申请号：US16896863

申请日：2020-06-09

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Naysen J. Robertson ,  Robert L. Noonan ,  David F. Heinrich

IPC: G06F13/40 ,  G06F13/368 ,  G06F13/16 ,  G06F9/48 ,  G06F9/46 ,  G06F9/54

Abstract: A processor executes firmware to write control data describing transfer descriptors for a bus protocol engine to an address that is associated with a transfer descriptor buffer for the bus protocol engine. The bus protocol engine performs an operation according to the transfer descriptors with a slave device; the processor is part of a first semiconductor package; the bus protocol engine is part of a second semiconductor package other than the first semiconductor package; and the address corresponds to a memory of the second semiconductor package. A first physical interface of the first semiconductor package communicates with a second physical interface of the second semiconductor package to direct the control data to the memory.