公开(公告)号：US20170286345A1

公开(公告)日：2017-10-05

申请号：US15510486

申请日：2014-11-07

Applicant: HITACHI, LTD.

Inventor： Yasuhiro IKEDA ,  Yutaka UEMATSU ,  Hideyuki KOSEKI ,  Masato SHIMIZU ,  Nobushige NAKAJIMA

IPC: G06F13/40 ,  G11C16/24 ,  G11C16/26

CPC classification number: G06F13/4022 ,  G06F12/0246 ,  G06F13/1684 ,  G06F13/4068 ,  G06F2212/1056 ,  G06F2212/263 ,  G06F2212/7208 ,  G11C5/066 ,  G11C7/1063 ,  G11C16/0483 ,  G11C16/06 ,  G11C16/24 ,  G11C16/26

Abstract: A semiconductor memory device includes, in addition to a first switching circuit with which a data system signal line between a plurality of semiconductor memory portions and a memory controller is branched, a second switching circuit with which a non-data system signal line between the plurality of semiconductor memory portions and the memory controller is branched, and the first and second switching circuits share a switching signal line.