公开(公告)号：US20240256243A1

公开(公告)日：2024-08-01

申请号：US18104169

申请日：2023-01-31

Applicant: Hitachi, Ltd.

Inventor： Taisuke UETA ,  Daisuke ISHII ,  Shoji YUNOKI

IPC: G06F8/61

CPC classification number: G06F8/61 ,  H04L67/10

Abstract: A method for selecting templates for application deployment. The method may include storing, a plurality of templates for deploying applications into at least one of at least one edge server or at least one cloud server, wherein the at least one cloud server communicates with the at least one edge server through a network; receiving, from the at least one edge server, configuration information of a plurality of edge devices and the at least one edge server, and operation condition information of applications deployed, wherein the plurality of edge devices is in communication with the at least one edge server; receiving, from the at least one cloud server, infrastructure resource information of the at least one cloud server; and deploying, application by selecting at least one of the plurality of templates based on the configuration information, the operation condition information, and the infrastructure resource information.

公开(公告)号：US20150146649A1

公开(公告)日：2015-05-28

申请号：US14551815

申请日：2014-11-24

Applicant: HITACHI, LTD.

Inventor： Taisuke UETA ,  Hideki ENDO ,  Masayuki TAKASE ,  Yusuke YAJIMA ,  Masanobu KOBAYASHI

IPC: H04L12/741 ,  H04W72/04

CPC classification number: H04L45/745

Abstract: A communication apparatus includes: a table set group comprising a plurality of table sets each containing a plurality of 1RD/1WR-configuration tables; a latest access holding table for specifying, for each flow, one of the table sets as the latest access destination of the each flow; and an updating unit for selecting, when a reference made to the latest access destination holding table with respect to a plurality of simultaneously received write requests shows that access destinations of flows indicated by the respective write requests are the same table set, a different table set for each of the flows indicated by the respective write requests, executing write processing in each table of the selected table set, and updating the latest access holding table so that the access destinations after the write processing are registered as access destinations of the flows indicated by the respective write requests.

Abstract translation: 通信装置包括：表组组，包括多个表组，每个表组包含多个1RD / 1WR配置表; 最新的访问保持表，用于为每个流指定一个表集合作为每个流的最新访问目的地; 以及更新单元，用于当对多个同时接收到的写入请求进行对最新的访问目的地保持表的引用时，选择表示各个写请求所指示的流的访问目的地是相同的表集合， 对于由各个写入请求指示的每个流程，在所选择的表格的每个表中执行写入处理，并且更新最新访问保持表，使得在写入处理之后的访问目的地被注册为由 各自的写请求。

公开(公告)号：US20170237828A1

公开(公告)日：2017-08-17

申请号：US15346899

申请日：2016-11-09

Applicant: HITACHI, LTD.

Inventor： Taisuke UETA ,  Masayuki TAKASE ,  Jun SUGAWA ,  Yasunari SHINOHARA

IPC: H04L29/08 ,  H04L12/46 ,  H04L29/06

CPC classification number: H04L67/34 ,  H04L12/4641 ,  H04L67/10 ,  H04L67/327 ,  H04L67/42 ,  H04W88/02

Abstract: To enable a communication apparatus, which transmits and receives data with a partially reconfigurable logic circuit, to configure a module while continuing a communication process. A communication apparatus transmits and receives data and includes a partially reconfigurable logic circuit and a management unit for managing a circuit configuration of the logic circuit. The logic circuit includes a plurality of modules and a data distribution unit. The management unit fixedly arranges a plurality of coupling interfaces, which are used for sending data to a module determined as a distribution destination of data by the data distribution unit and which are respectively linkable to the plurality of modules, at prescribed positions on the logic circuit, and creates the module in the partially reconfigurable area of the logic circuit so as to be linked to any of the plurality of coupling interfaces.

公开(公告)号：US20170257259A1

公开(公告)日：2017-09-07

申请号：US15337149

申请日：2016-10-28

Applicant: Hitachi, Ltd.

Inventor： Nodoka MIMURA ,  Masashi YANO ,  Masayuki TAKASE ,  Taisuke UETA

IPC: H04L12/24

CPC classification number: H04L41/0627 ,  H04L12/4625 ,  H04L12/66 ,  H04L43/0817 ,  H04L63/0272 ,  H04L63/08 ,  H04L67/12 ,  H04L67/125 ,  H04L67/303

Abstract: To reduce a load of an inspection process on a server apparatus . A computer system includes a server apparatus, a gateway apparatus, and a plurality of devices coupled to the gateway apparatus. The gateway apparatus retains a range of a normal value of a device, calculated based on device information, for the plurality of devices, and when device information related to a certain device is not included in a range of a normal value of the device, notifies the server apparatus of the fact that an anomaly with respect to the device has been detected. When the server apparatus receives from the gateway apparatus a notification of the fact that an anomaly has been detected, the server apparatus inspects device information related to the device in which the anomaly had been detected.

公开(公告)号：US20230025013A1

公开(公告)日：2023-01-26

申请号：US17694100

申请日：2022-03-14

Applicant: Hitachi, Ltd.

Inventor： Taisuke UETA ,  Daisuke ISHII ,  Daisuke ITO

IPC: G06F9/445

Abstract: Meta data is provided flexibly according to an application A related data extraction apparatus for extracting related data which is given to data collected from a target system and is related to the data includes: a configuration data accumulation unit that manages configuration information of the target system; a configuration data input unit that accepts input of registration or update of the configuration information; an application linkage unit that accepts a request for the related data given to the data by an application for analyzing the data; and a related data extraction unit that extracts the related data from the configuration information on the basis of the request.

公开(公告)号：US20220326680A1

公开(公告)日：2022-10-13

申请号：US17709611

申请日：2022-03-31

Applicant: Hitachi, Ltd.

Inventor： Masayuki SAKATA ,  Yoshinari HORI ,  Daisuke ITO ,  Toshihiko KASHIYAMA ,  Taisuke UETA ,  Masaaki IWASAKI

IPC: G05B19/4069

Abstract: A digital twin management system manages a virtual model that represents an actual physical system in a virtual space on a real-time basis. To generate an integrated virtual model by adding a second virtual model to a first virtual model, a processor of the digital twin system extracts multiple parts that can be used in common in the first virtual model and the second virtual model, generates multiple integrated virtual models that are candidates of an integrated virtual model by changing the extracted parts that can be used in common, calculates an evaluation of each of the generated integrated virtual models, and outputs configuration information regarding each of the integrated virtual model candidates and an evaluation of the integrated virtual model candidate in association with each other.

公开(公告)号：US20140010233A1

公开(公告)日：2014-01-09

申请号：US13929995

申请日：2013-06-28

Applicant: Hitachi, Ltd.

Inventor： Masayuki TAKASE ,  Akihiko TSUCHIYA ,  Taisuke UETA ,  Yusuke YAJIMA ,  Hayato HOSHIHARA

IPC: H04L29/06 ,  H04L12/723

CPC classification number: H04L69/24 ,  H04L45/22 ,  H04L45/302 ,  H04L45/50 ,  H04L47/728 ,  H04L47/762 ,  H04L69/14

Abstract: A communication device includes a flow identification unit specifying a user corresponding to received data, a bandwidth control unit controlling transmission of the received data so as not to exceed a bandwidth corresponding to the selected communication path in two bandwidths allocated to the specified user, and a label addition unit adding the label value corresponding to the selected communication path to the data received from the bandwidth control unit and transmitting the data. The label addition unit executes, upon detecting a trigger for a change in the selection of the communication path, changing the selection of the label value and transmitting a feedback signal for giving notice of the change in the selection of the communication path to the bandwidth control unit in a given order. The bandwidth control unit executes a process of changing the setup of the bandwidth on the basis of the received feedback signal.

Abstract translation: 通信装置包括指定与接收到的数据对应的用户的流量识别单元，带宽控制单元，控制接收到的数据的传输，以便在分配给指定的用户的两个带宽中不超过与所选择的通信路径相对应的带宽， 标签添加单元将与所选择的通信路径相对应的标签值添加到从带宽控制单元接收的数据，并发送数据。 标签添加单元在检测到用于通信路径的选择的改变的触发时，执行改变标签值的选择，并且发送用于给通信路径的选择改变通知的反馈信号到带宽控制 以给定的顺序单位。 带宽控制单元基于所接收的反馈信号执行改变带宽的建立的处理。

公开(公告)号：US20130322450A1

公开(公告)日：2013-12-05

申请号：US13905791

申请日：2013-05-30

Applicant: Hitachi, Ltd.

Inventor： Taisuke UETA ,  Hayato HOSHIHARA ,  Masayuki TAKASE ,  Akihiko TSUCHIYA ,  Yusuke YAJIMA

IPC: H04L12/741

CPC classification number: H04L45/74 ,  H04L49/00 ,  H04L49/1523

Abstract: In an exemplary communication apparatus, an assignment module determines whether processing for a second packet assigned the flow ID associated with a received first packet is being executed. The assignment module determines a parallel processing module to execute processing for the first packet and a parameter to be included in a notice of assignment. The determined parallel processing module acquires a result of execution of the processing for the second packet from the computation table or the result of execution of the processing held in the parallel processing module according to the received notice of assignment. The determined parallel processing module executes the processing for the first packet using the result of execution of the processing for the second packet and the information included in the notice of assignment, and updates a computation table with a result of execution of the processing for the first packet.

Abstract translation: 在示例性通信装置中，分配模块确定正在执行与分配的与接收到的第一分组相关联的流ID的第二分组的处理。 分配模块确定并行处理模块以执行第一分组的处理以及要包括在分配通知中的参数。 所确定的并行处理模块根据接收到的分配通知，从计算表中获取执行针对第二分组的处理的结果或者并行处理模块中保存的处理的执行结果。 所确定的并行处理模块使用对第二分组的处理的执行结果和包括在分配通知中的信息的结果来执行第一分组的处理，并且更新具有执行第一分组的处理结果的计算表 包。

公开(公告)号：US20240385599A1

公开(公告)日：2024-11-21

申请号：US18199491

申请日：2023-05-19

Applicant: HITACHI, Ltd.

Inventor： Shoji YUNOKI ,  Daisuke ISHII ,  Taisuke UETA

IPC: G05B19/418

Abstract: A method for optimizing communication resource. The method may include substituting, by a processor, previous production line states associated with at least one production line to a default null state; and performing iteratively, by the processor: accessing production line information to obtain current production line state associated with the at least one production line; for each of the at least one production line: determining if previous production line state matches current production line state, for previous production line state not matching current production line state: accessing device information to retrieve IP address list of devices associated with production line, accessing quality of service (QOS) association information to retrieve QoS level for each of the devices, and creating pairings of IP address and QoS level in QoS configuration information for each device of the devices based on the IP address list and the QoS association information.

公开(公告)号：US20170070573A1

公开(公告)日：2017-03-09

申请号：US15190697

申请日：2016-06-23

Applicant: HITACHI, LTD.

Inventor： Masayuki TAKASE ,  Taisuke UETA ,  Yuji OISHI ,  Yasunari SHINOHARA

IPC: H04L29/08 ,  G06F17/30

CPC classification number: H04L67/1097 ,  H04L67/06

Abstract: A data processing device includes: an FPGA that includes a plurality of core circuits to which a data processing function is settable through a program file, and processes input data through the core circuits; an FPGA circuit file storage unit that stores the program file; and a control unit that sets the data processing function to the core circuits. In the data processing device, a request including information specifying the data processing function to be set and the core circuit is transmitted to a file management server, the data processing function is set based on a program file received in response to the request, and the received program file is stored in the FPGA circuit file storage unit.

Abstract translation: 数据处理装置包括：FPGA，其包括通过程序文件可设置数据处理功能的多个核心电路，并且通过核心电路处理输入数据; 存储程序文件的FPGA电路文件存储单元; 以及将数据处理功能设置为核心电路的控制单元。 在数据处理装置中，包括指定要设置的数据处理功能的信息和核心电路被发送到文件管理服务器的请求，基于响应于该请求而接收的程序文件来设置数据处理功能， 接收的程序文件存储在FPGA电路文件存储单元中。