Abstract:
Transportation control in a vacuum processing device with high transportation efficiency without lowering throughput is provided. A control unit is configured to update in real time and holds device state information showing an action state of each of a process chamber, a transportation mechanism unit, a buffer room, and a holding mechanism unit, the presence of a process subject member, and a process state thereof; select a transport algorithm from among transport algorithm judgment rules that are obtained by simulating in advance a plurality of transport algorithms for controlling transportation of a process subject member for each condition of a combination of the number and arrangement of the process chambers and process time of a process subject member based on the device state information and process time of the process subject member; and compute a transport destination of the process subject member based on the selected transport algorithm.
Abstract:
A semiconductor processing apparatus is provided, which includes processing chambers coupled together by transport mechanisms having transfer robots. After having completed wafer processing in each processing chamber, the allowable value of a time permitted for a processing-completed wafer to continue residing within the processing chamber is set up. Then, a time consumed up to the completion of transportation of a wafer scheduled to be next processed is estimated, thereby controlling a transfer robot in a way such that, when the estimated transfer time exceeds the allowable value of the waiting time, priority is given to an operation for unloading a processed wafer from the processing chamber insofar as the processed wafer's transfer destination is already in its state capable of accepting such wafer.
Abstract:
Provided is a method that may quickly and simply select the allocation of the type of wafers to the processing chamber having a higher productivity in a semiconductor processing device in which a plurality of conveyance robots is disposed in a conveyance mechanism to which a processing chamber is connected and an object to be processed is delivered between the plurality of conveyance robots, when processings are performed on a plurality of types of wafers in parallel. From the information on the arrangement of the processing chambers of the semiconductor processing device and input type of wafers to be processed, the processing chamber allocation candidate is comprehensively generated and a simulation that manufactures all processing targets for each of the processing chamber allocation candidates is performed to calculate a productivity and the candidates are displayed in the order from a higher productivity to support the adoption of a user.