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公开(公告)号：US08405145B2
公开(公告)日：2013-03-26
申请号：US13153348
申请日：2011-06-03
IPC分类号： H01L27/108 , H01L29/78
CPC分类号： H01L27/0629 , H01L21/26586 , H01L21/76897 , H01L29/0615 , H01L29/086 , H01L29/1095 , H01L29/41741 , H01L29/41766 , H01L29/42368 , H01L29/456 , H01L29/4933 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/8725
摘要： A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.
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公开(公告)号：US07759730B2
公开(公告)日：2010-07-20
申请号：US12463962
申请日：2009-05-11
IPC分类号： H01L27/108
CPC分类号： H01L27/0629 , H01L21/26586 , H01L21/76897 , H01L29/0615 , H01L29/086 , H01L29/1095 , H01L29/41741 , H01L29/41766 , H01L29/42368 , H01L29/456 , H01L29/4933 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/8725
摘要： A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.
摘要翻译： 栅极沟槽13形成在半导体衬底10中。栅极沟槽13设置有形成在栅极绝缘膜14上的栅电极16.栅电极16的一部分从半导体衬底10突出，侧壁24为 形成在突出部分的侧壁部分上。 形成与相邻的栅电极16对准的主体沟槽25.在栅电极16的表面上并在主体沟槽25的表面之上形成硅化钴膜28.使用SAC技术形成插塞34。
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公开(公告)号：US07968939B2
公开(公告)日：2011-06-28
申请号：US12954877
申请日：2010-11-28
IPC分类号： H01L27/108 , H01L29/78
CPC分类号： H01L27/0629 , H01L21/26586 , H01L21/76897 , H01L29/0615 , H01L29/086 , H01L29/1095 , H01L29/41741 , H01L29/41766 , H01L29/42368 , H01L29/456 , H01L29/4933 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/8725
摘要： A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.
摘要翻译： 栅极沟槽13形成在半导体衬底10中。栅极沟槽13设置有形成在栅极绝缘膜14上的栅电极16.栅电极16的一部分从半导体衬底10突出，侧壁24为 形成在突出部分的侧壁部分上。 形成与相邻的栅电极16对准的主体沟槽25.在栅电极16的表面上并在主体沟槽25的表面之上形成硅化钴膜28.使用SAC技术形成插塞34。
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公开(公告)号：US07544568B2
公开(公告)日：2009-06-09
申请号：US11836574
申请日：2007-08-09
IPC分类号： H01L27/108
CPC分类号： H01L27/0629 , H01L21/26586 , H01L21/76897 , H01L29/0615 , H01L29/086 , H01L29/1095 , H01L29/41741 , H01L29/41766 , H01L29/42368 , H01L29/456 , H01L29/4933 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/8725
摘要： A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.
摘要翻译： 栅极沟槽13形成在半导体衬底10中。栅极沟槽13设置有形成在栅极绝缘膜14上的栅电极16.栅电极16的一部分从半导体衬底10突出，侧壁24为 形成在突出部分的侧壁部分上。 形成与相邻的栅电极16对准的主体沟槽25.在栅电极16的表面上并在主体沟槽25的表面之上形成硅化钴膜28.使用SAC技术形成插塞34。
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公开(公告)号：US07847347B2
公开(公告)日：2010-12-07
申请号：US12724409
申请日：2010-03-15
IPC分类号： H01L27/108
CPC分类号： H01L27/0629 , H01L21/26586 , H01L21/76897 , H01L29/0615 , H01L29/086 , H01L29/1095 , H01L29/41741 , H01L29/41766 , H01L29/42368 , H01L29/456 , H01L29/4933 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/8725
摘要： A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.
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公开(公告)号：US20090224315A1
公开(公告)日：2009-09-10
申请号：US12463962
申请日：2009-05-11
IPC分类号： H01L29/78
CPC分类号： H01L27/0629 , H01L21/26586 , H01L21/76897 , H01L29/0615 , H01L29/086 , H01L29/1095 , H01L29/41741 , H01L29/41766 , H01L29/42368 , H01L29/456 , H01L29/4933 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/8725
摘要： A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.
摘要翻译： 栅极沟槽13形成在半导体衬底10中。栅极沟槽13设置有形成在栅极绝缘膜14上的栅电极16.栅电极16的一部分从半导体衬底10突出，侧壁24为 形成在突出部分的侧壁部分上。 形成与相邻的栅电极16对准的主体沟槽25.在栅电极16的表面上并在主体沟槽25的表面之上形成硅化钴膜28.使用SAC技术形成插塞34。
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公开(公告)号：US20080035990A1
公开(公告)日：2008-02-14
申请号：US11836574
申请日：2007-08-09
IPC分类号： H01L21/336 , H01L29/772
CPC分类号： H01L27/0629 , H01L21/26586 , H01L21/76897 , H01L29/0615 , H01L29/086 , H01L29/1095 , H01L29/41741 , H01L29/41766 , H01L29/42368 , H01L29/456 , H01L29/4933 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/8725
摘要： A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.
摘要翻译： 在半导体衬底10中形成栅沟槽13。 栅极沟槽13设置有形成在栅极绝缘膜14上的栅电极16。 栅电极16的一部分从半导体基板10突出，并且在突出部分的侧壁部分上形成侧壁24。 主体沟槽25形成为与相邻的栅电极16对准。 在栅电极16的表面上并在体沟槽25的表面上形成钴硅化物膜28。 使用SAC技术形成插头34。
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公开(公告)号：US20110233665A1
公开(公告)日：2011-09-29
申请号：US13153348
申请日：2011-06-03
IPC分类号： H01L29/78
CPC分类号： H01L27/0629 , H01L21/26586 , H01L21/76897 , H01L29/0615 , H01L29/086 , H01L29/1095 , H01L29/41741 , H01L29/41766 , H01L29/42368 , H01L29/456 , H01L29/4933 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/8725
摘要： A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.
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公开(公告)号：US20110068392A1
公开(公告)日：2011-03-24
申请号：US12954877
申请日：2010-11-28
IPC分类号： H01L29/78
CPC分类号： H01L27/0629 , H01L21/26586 , H01L21/76897 , H01L29/0615 , H01L29/086 , H01L29/1095 , H01L29/41741 , H01L29/41766 , H01L29/42368 , H01L29/456 , H01L29/4933 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/8725
摘要： A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.
摘要翻译： 栅极沟槽13形成在半导体衬底10中。栅极沟槽13设置有形成在栅极绝缘膜14上的栅电极16.栅电极16的一部分从半导体衬底10突出，侧壁24为 形成在突出部分的侧壁部分上。 形成与相邻的栅电极16对准的主体沟槽25.在栅电极16的表面上并在主体沟槽25的表面之上形成硅化钴膜28.使用SAC技术形成插塞34。
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公开(公告)号：US20100171174A1
公开(公告)日：2010-07-08
申请号：US12724409
申请日：2010-03-15
IPC分类号： H01L27/06
CPC分类号： H01L27/0629 , H01L21/26586 , H01L21/76897 , H01L29/0615 , H01L29/086 , H01L29/1095 , H01L29/41741 , H01L29/41766 , H01L29/42368 , H01L29/456 , H01L29/4933 , H01L29/66719 , H01L29/66727 , H01L29/66734 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/8725
摘要： A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.
摘要翻译： 栅极沟槽13形成在半导体衬底10中。栅极沟槽13设置有形成在栅极绝缘膜14上的栅电极16.栅电极16的一部分从半导体衬底10突出，侧壁24为 形成在突出部分的侧壁部分上。 形成与相邻的栅电极16对准的主体沟槽25.在栅电极16的表面上并在主体沟槽25的表面之上形成硅化钴膜28.使用SAC技术形成插塞34。
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