公开(公告)号：US09531571B2

公开(公告)日：2016-12-27

申请号：US14144767

申请日：2013-12-31

Applicant: HRL Laboratories, LLC

Inventor： Zhiwei A. Xu ,  Yen-Cheng Kuan ,  James Chingwei Li ,  Donald A. Hitko ,  Joseph F. Jensen

IPC: H04L25/00 ,  H04L25/08 ,  H03D7/14

CPC classification number: H04L25/08 ,  H03D7/1441 ,  H03D7/1458 ,  H04B1/0035

Abstract: An agile transceiver including a receiver channel that includes an input, a coarse tracking filter coupled to the input, the coarse tracking filter having a set of at least two bandpass filters for filtering signals from the input into at least two coarse pass bands, a mixer coupled to an output of the coarse tracking filter, a selected local oscillator coupled to the mixer for mixing with the output of the coarse tracking filter and shifting a desired coarse pass band to near a base band, a fine tracking filter for filtering the shifted and desired coarse pass band to a fine pass band, and a band pass ΣΔ demodulator for converting signals in the fine pass band from analog into digital. The agile transceiver may include a corresponding transmitter channel.

Abstract translation: 一种敏捷收发器，包括包括输入的接收器通道，耦合到输入的粗跟踪滤波器，粗跟踪滤波器具有一组至少两个带通滤波器，用于将来自输入的信号滤波成至少两个粗通带;混频器 耦合到粗跟踪滤波器的输出，耦合到混频器的选定的本地振荡器，用于与粗跟踪滤波器的输出混合并将期望的粗通带移位到基带附近;精细跟踪滤波器，用于滤波偏移和 期望的粗通带到细通带，以及带通ΣΔ解调器，用于将细通带中的信号从模拟转换成数字。 敏捷收发器可以包括相应的发射机信道。

公开(公告)号：US09087854B1

公开(公告)日：2015-07-21

申请号：US14158962

申请日：2014-01-20

Applicant: HRL Laboratories, LLC

Inventor： Wonill Ha ,  Hasan Sharifi ,  Tahir Hussain ,  James Chingwei Li ,  Pamela R. Patterson

IPC: H01L23/60 ,  H01L29/66 ,  H01L27/06 ,  H01L29/778

CPC classification number: H01L29/66431 ,  H01L21/8252 ,  H01L21/8258 ,  H01L23/36 ,  H01L23/3677 ,  H01L27/0623 ,  H01L27/0688

Abstract: A method of three dimensional heterogeneous integration including forming HBT devices on a first substrate, each HBT device having a collector, removing the first substrate, forming first bonding pads on each collector of the heterojunction bipolar transistor devices, forming high electron mobility transistor (HEMT) devices on a first side of a growth substrate, wherein the growth substrate comprises a thermally conductive substrate, such as SiC or diamond, forming second bonding pads on the first side of the growth substrate, aligning and bonding the first bonding pads to the second bonding pads, forming CMOS devices on a Si substrate, bonding the CMOS devices on the Si substrate to a second side of the growth substrate, and forming selectively interconnects between the HBT devices, the HEMT devices, and the CMOS devices by forming vias and first and second level metal interconnects.

Abstract translation: 一种三维非均匀集成的方法，包括在第一衬底上形成HBT器件，每个HBT器件具有集电极，去除第一衬底，在异质结双极晶体管器件的每个集电极上形成第一接合焊盘，形成高电子迁移率晶体管（HEMT） 生长衬底的第一侧上的器件，其中所述生长衬底包括诸如SiC或金刚石的导热衬底，在所述生长衬底的第一侧上形成第二接合焊盘，将所述第一接合焊盘对准和接合到所述第二接合 衬垫，在Si衬底上形成CMOS器件，将Si衬底上的CMOS器件接合到生长衬底的第二侧，以及通过形成通孔，首先形成通孔并在HBT器件，HEMT器件和CMOS器件之间选择性地形成互连 二级金属互连。

公开(公告)号：US10361731B2

公开(公告)日：2019-07-23

申请号：US15828106

申请日：2017-11-30

Applicant: HRL Laboratories, LLC

Inventor： Zhiwei A. Xu ,  Yen-Cheng Kuan ,  Cynthia D. Baringer ,  Hasan Sharifi ,  James Chingwei Li ,  Donald A. Hitko

IPC: H04B1/04 ,  H03M3/00 ,  H03M7/16

Abstract: A Delta-Sigma modulator architecture is disclosed that uses interleaving and dynamic matching algorithms to address the needs of multi-mode, multi-band high bandwidth transmitters. The proposed architecture also supports a novel software defined transmitter architecture based on an interleaved Delta-Sigma modulator to generate RF signals. The proposed architecture leverages interleaving concepts to relax subcomponent clock rates without changing the effective oversampling ratio, thus, making it easier to reach aggressive dynamic range goals across wider bandwidths at higher frequencies. The DEM algorithm helps to randomize mismatch errors across all interleaved paths and improves substantially the signal-to-noise ratio. Additionally, a tunable bandpass filter can be added to reject out-of-band emissions.

公开(公告)号：US20190165820A1

公开(公告)日：2019-05-30

申请号：US15828106

申请日：2017-11-30

Applicant: HRL Laboratories, LLC

Inventor： Zhiwei A. Xu ,  Yen-Cheng Kuan ,  Cynthia D. Baringer ,  Hasan Sharifi ,  James Chingwei Li ,  Donald A. Hitko

IPC: H04B1/04 ,  H03M3/00

CPC classification number: H04B1/04 ,  H03M3/502 ,  H03M7/165

Abstract: A Delta-Sigma modulator architecture is disclosed that uses interleaving and dynamic matching algorithms to address the needs of multi-mode, multi-band high bandwidth transmitters. The proposed architecture also supports a novel software defined transmitter architecture based on an interleaved Delta-Sigma modulator to generate RF signals. The proposed architecture leverages interleaving concepts to relax subcomponent clock rates without changing the effective oversampling ratio, thus, making it easier to reach aggressive dynamic range goals across wider bandwidths at higher frequencies. The DEM algorithm helps to randomize mismatch errors across all interleaved paths and improves substantially the signal-to-noise ratio. Additionally, a tunable bandpass filter can be added to reject out-of-band emissions.

公开(公告)号：US20150188737A1

公开(公告)日：2015-07-02

申请号：US14144767

申请日：2013-12-31

Applicant: HRL Laboratories, LLC

Inventor： Zhiwei A. XU ,  Yen-Cheng Kuan ,  James Chingwei Li ,  Donald A. Hitko ,  Joseph F. Jensen

IPC: H04L25/08 ,  H03D7/14

CPC classification number: H04L25/08 ,  H03D7/1441 ,  H03D7/1458 ,  H04B1/0035

Abstract: An agile transceiver including a receiver channel that includes an input, a coarse tracking filter coupled to the input, the coarse tracking filter having a set of at least two bandpass filters for filtering signals from the input into at least two coarse pass bands, a mixer coupled to an output of the coarse tracking filter, a selected local oscillator coupled to the mixer for mixing with the output of the coarse tracking filter and shifting a desired coarse pass band to near a base band, a fine tracking filter for filtering the shifted and desired coarse pass band to a fine pass band, and a band pass ΣΔ demodulator for converting signals in the fine pass band from analog into digital. The agile transceiver may include a corresponding transmitter channel.

Abstract translation: 一种敏捷收发器，包括包括输入的接收器通道，耦合到输入的粗跟踪滤波器，粗跟踪滤波器具有一组至少两个带通滤波器，用于将来自输入的信号滤波成至少两个粗通带;混频器 耦合到粗跟踪滤波器的输出，耦合到混频器的选定的本地振荡器，用于与粗跟踪滤波器的输出混合并将期望的粗通带移位到基带附近;精细跟踪滤波器，用于滤波偏移和 期望的粗通带到细通带，带通＆amp; Dgr; 解调器，用于将细通带中的信号从模拟转换成数字。 敏捷收发器可以包括相应的发射机信道。

公开(公告)号：US10515872B1

公开(公告)日：2019-12-24

申请号：US15298609

申请日：2016-10-20

Applicant: HRL Laboratories, LLC

Inventor： James Chingwei Li ,  Yakov Royter ,  Pamela R. Patterson ,  Donald A. Hitko

IPC: H01L29/40 ,  H01L23/48 ,  H01L29/66 ,  H01L23/373 ,  H01L21/683 ,  H01L29/49 ,  H01L23/535 ,  H01L21/74 ,  H01L21/304 ,  H01L21/20 ,  H01L29/737 ,  H01L33/64 ,  H01L29/417 ,  H01L29/45

Abstract: A transistor having an emitter, a base, and a collector, the transistor includes a substrate, a collector contact, a metallic sub-collector coupled to the collector contact, and the metallic sub-collector electrically and thermally coupled to the collector, and an adhesive layer between the substrate and the metallic sub-collector, the adhesive layer bonded to the substrate and in direct contact with the substrate and bonded to the metallic sub-collector and in direct contact with the metallic sub-collector, wherein the adhesive layer comprises an electrically conductive material.

公开(公告)号：US09691761B1

公开(公告)日：2017-06-27

申请号：US15335207

申请日：2016-10-26

Applicant: HRL Laboratories, LLC

Inventor： Pamela R. Patterson ,  Keisuke Shinohara ,  Hasan Sharifi ,  Wonill Ha ,  Tahir Hussain ,  James Chingwei Li ,  Dana C. Wheeler

IPC: H01L27/00 ,  H01L27/06 ,  H01L21/8258 ,  H01L29/165

CPC classification number: H01L27/0688 ,  H01L21/8252 ,  H01L21/8258 ,  H01L21/84 ,  H01L23/481 ,  H01L27/0605 ,  H01L27/085 ,  H01L27/1203 ,  H01L29/165 ,  H01L2224/32145 ,  H01L2224/73265 ,  H01L2224/97

Abstract: A compound semiconductor integrated circuit comprising a first substrate; a first electronic component formed on top of said first substrate; a layer of a first dielectric material formed on top of said first substrate and including said first electronic component, said layer of a first dielectric material comprising a recess exposing a first region of said first substrate; and a layer of a second dielectric material attached to said first substrate on top of said first region of said first substrate after manufacturing of said layer of a second dielectric material, said layer of a second material comprising a second electronic component.

公开(公告)号：US09515068B1

公开(公告)日：2016-12-06

申请号：US14014121

申请日：2013-08-29

Applicant: HRL Laboratories, LLC

Inventor： Pamela R. Patterson ,  Keisuke Shinohara ,  Hasan Sharifi ,  Wonill Ha ,  Tahir Hussain ,  James Chingwei Li ,  Dana C. Wheeler

IPC: H01L27/00 ,  H01L27/06 ,  H01L21/84 ,  H01L27/12 ,  H01L23/48

CPC classification number: H01L27/0688 ,  H01L21/8252 ,  H01L21/8258 ,  H01L21/84 ,  H01L23/481 ,  H01L27/0605 ,  H01L27/085 ,  H01L27/1203 ,  H01L29/165 ,  H01L2224/32145 ,  H01L2224/73265 ,  H01L2224/97

Abstract: A compound semiconductor integrated circuit comprising a first substrate; a first electronic component formed on top of said first substrate; a layer of a first dielectric material formed on top of said first substrate and including said first electronic component, said layer of a first dielectric material comprising a recess exposing a first region of said first substrate; and a layer of a second dielectric material attached to said first substrate on top of said first region of said first substrate after manufacturing of said layer of a second dielectric material, said layer of a second material comprising a second electronic component.

Abstract translation: 一种复合半导体集成电路，包括第一衬底; 形成在所述第一基板的顶部上的第一电子部件; 形成在所述第一基板的顶部并包括所述第一电子部件的第一介电材料层，所述第一介电材料层包括露出所述第一基板的第一区域的凹部; 以及在制造所述第二介电材料层之后，在所述第一衬底的所述第一区域的顶部附着到所述第一衬底的第二电介质材料层，所述第二材料层包括第二电子部件。

公开(公告)号：US09383266B1

公开(公告)日：2016-07-05

申请号：US14054693

申请日：2013-10-15

Applicant: HRL Laboratories, LLC

Inventor： James Chingwei Li ,  Tahir Hussain

IPC: H01L29/417 ,  H01L29/423 ,  H01L21/66 ,  H01L21/768 ,  G01K7/22

CPC classification number: G01K7/22 ,  G01K7/015 ,  H01L22/34

Abstract: A field effect transistor (FET) having a source, a drain and a gate includes a first connection electrically connected to the gate near a first end of the gate, a second connection electrically connected to the gate near the first end of the gate, a third connection electrically connected to the gate near a second end of the gate, and a fourth connection electrically connected to the gate near the second end of the gate. By performing gate resistance measurements at different ambient temperatures, a thermal coefficient of gate resistance can be derived and then used to monitor the gate temperature, which is representative of the channel temperature.