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    Envelope tracking active circulator
    2.
    发明授权
    Envelope tracking active circulator 有权

    公开(公告)号：US10177741B1

    公开(公告)日：2019-01-08

    申请号：US15240992

    申请日：2016-08-18

    Applicant: HRL Laboratories, LLC

    Inventor： Jongchan Kang ,  Hasan Sharifi

    IPC: H03H11/38 ,  H03H11/04

    Abstract: Several embodiments of an envelope tracking active circulator is disclosed with a method to cascade them. In an active transistor based circulator (active circulator), gate (base) and drain (collector) bias voltage can be adjusted by RF or microwave input envelop signal. This is called envelop tracking active circulator. In this concept, input RF signal is detected by detection circuit, such as detection diode or coupler and converted into low frequency envelop signal by the proper filtering circuitry. The generated envelop signal controls the supply voltage of the drain and gate with the proper function of the envelop signal to improve active circulator insertion loss, isolation and power handling capability. This concept can be applied to any type of solid-state FET (Field effect transistor) transistor based active circulator, as long as they have bias dependent trans-conductance and capacitances inside. For a BJT (bipolar junction transistor) based active circulator, base bias current supply modulator will be used instead of voltage supply modulator.

    Back-to-back dual band p-CB-n
    3.
    发明授权
    Back-to-back dual band p-CB-n 有权

    公开(公告)号：US11158754B1

    公开(公告)日：2021-10-26

    申请号：US14455820

    申请日：2014-08-08

    Applicant: HRL LABORATORIES LLC

    Inventor： Pierre-Yves Delaunay ,  Brett Z. Nosho ,  Hasan Sharifi

    IPC: H01L31/101 ,  H01L31/0216 ,  H01L27/146

    Abstract: A structure is disclosed. The structure contains a second detector disposed above a first detector, wherein the first detector contains a first absorber layer, a first barrier layer disposed above the first absorber layer, a first contact layer disposed above the first barrier layer, and wherein the second detector contains a second contact layer disposed above the first contact layer, a second barrier layer disposed above the second contact layer, a second absorber layer disposed above the second barrier layer.

    Active circulator with cascode transistor
    7.
    发明授权
    Active circulator with cascode transistor 有权

    公开(公告)号：US09641156B1

    公开(公告)日：2017-05-02

    申请号：US14949044

    申请日：2015-11-23

    Applicant: HRL LABORATORIES, LLC

    Inventor： Jongchan Kang ,  Hasan Sharifi ,  Eric M. Prophet

    IPC: H01P1/32 ,  H03H11/38

    CPC classification number: H03H11/38 ,  H03K17/693

    Abstract: A multi-port active circulator includes a plurality of cascode circuits coupled to one another in a ring. Each respective cascode circuit of the plurality of cascode circuits is coupled to a respective port of a plurality of ports. Each respective cascode circuit includes a common source transistor, a common gate transistor coupled to the common source transistor, and a feedback circuit coupled from the common gate transistor to the common source transistor. Each common source transistor of each respective cascode circuit is coupled to a common junction point.

    Interleaved sigma delta modulator based SDR transmitter
    9.
    发明授权
    Interleaved sigma delta modulator based SDR transmitter 有权

    公开(公告)号：US10361731B2

    公开(公告)日：2019-07-23

    申请号：US15828106

    申请日：2017-11-30

    Applicant: HRL Laboratories, LLC

    Inventor： Zhiwei A. Xu ,  Yen-Cheng Kuan ,  Cynthia D. Baringer ,  Hasan Sharifi ,  James Chingwei Li ,  Donald A. Hitko

    IPC: H04B1/04 ,  H03M3/00 ,  H03M7/16

    Abstract: A Delta-Sigma modulator architecture is disclosed that uses interleaving and dynamic matching algorithms to address the needs of multi-mode, multi-band high bandwidth transmitters. The proposed architecture also supports a novel software defined transmitter architecture based on an interleaved Delta-Sigma modulator to generate RF signals. The proposed architecture leverages interleaving concepts to relax subcomponent clock rates without changing the effective oversampling ratio, thus, making it easier to reach aggressive dynamic range goals across wider bandwidths at higher frequencies. The DEM algorithm helps to randomize mismatch errors across all interleaved paths and improves substantially the signal-to-noise ratio. Additionally, a tunable bandpass filter can be added to reject out-of-band emissions.

    INTERLEAVED SIGMA DELTA MODULATOR BASED SDR TRANSMITTER
    10.
    发明申请
    INTERLEAVED SIGMA DELTA MODULATOR BASED SDR TRANSMITTER 审中-公开

    公开(公告)号：US20190165820A1

    公开(公告)日：2019-05-30

    申请号：US15828106

    申请日：2017-11-30

    Applicant: HRL Laboratories, LLC

    Inventor： Zhiwei A. Xu ,  Yen-Cheng Kuan ,  Cynthia D. Baringer ,  Hasan Sharifi ,  James Chingwei Li ,  Donald A. Hitko

    IPC: H04B1/04 ,  H03M3/00

    CPC classification number: H04B1/04 ,  H03M3/502 ,  H03M7/165

    Abstract: A Delta-Sigma modulator architecture is disclosed that uses interleaving and dynamic matching algorithms to address the needs of multi-mode, multi-band high bandwidth transmitters. The proposed architecture also supports a novel software defined transmitter architecture based on an interleaved Delta-Sigma modulator to generate RF signals. The proposed architecture leverages interleaving concepts to relax subcomponent clock rates without changing the effective oversampling ratio, thus, making it easier to reach aggressive dynamic range goals across wider bandwidths at higher frequencies. The DEM algorithm helps to randomize mismatch errors across all interleaved paths and improves substantially the signal-to-noise ratio. Additionally, a tunable bandpass filter can be added to reject out-of-band emissions.

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