Data transmission method in flexible ethernet and device

    公开(公告)号:US11799992B2

    公开(公告)日:2023-10-24

    申请号:US17489261

    申请日:2021-09-29

    CPC classification number: H04L69/324 H04L9/40 H04L65/40 H04L69/02 H04L12/40

    Abstract: A data transmission method in FlexE includes: obtaining multiple data blocks sent by L FlexE clients, where L is greater than or equal to 1; and sending a data frame including the multiple data blocks to a physical-layer device, where a transmission rate of the data frame is N*100 Gbit/s, the data frame includes T data block groups, each of the T data block groups includes M continuous data block subgroups, each of the M continuous data block subgroups includes R*N continuous data blocks, the data frame further includes T overhead block groups, a tth overhead block group includes N continuous overhead blocks. According to the method, each data block subgroup in a data frame can include R*N data blocks, and each overhead block group can include N overhead blocks, and a data transmission rate can be adjusted flexibly.

    Network Synchronization Method, Apparatus, Device, and System, and Readable Storage Medium

    公开(公告)号:US20230291537A1

    公开(公告)日:2023-09-14

    申请号:US18317697

    申请日:2023-05-15

    CPC classification number: H04L7/0087

    Abstract: A method includes: a first network device obtains a synchronization mode indication and synchronization information, where the synchronization mode indication indicates a target network device to perform synchronization based on the synchronization information. The first network device sends the synchronization mode indication and the synchronization information through a network that supports FlexE. A second network device receives the synchronization mode indication and the synchronization information through a network that supports FlexE. The second network device performs synchronization based on the synchronization mode indication and the synchronization information.

    Data Transmission Method and Device
    4.
    发明公开

    公开(公告)号:US20230155756A1

    公开(公告)日:2023-05-18

    申请号:US18155804

    申请日:2023-01-18

    CPC classification number: H04L5/0044 H04J3/16

    Abstract: This application provides a data transmission method, a communications apparatus, a network device, a communications system, a storage medium, and a computer program product, to resolve a current problem that bandwidth waste is relatively severe when a service is carried based on a FlexE technology. In this application, a frame structure of a fine-granularity service frame is newly defined, so that service data can be transmitted in a time division multiplexing mode by using an Ethernet (ETH) interface.

    Method and apparatus for sending and receiving clock synchronization packet

    公开(公告)号:US11356188B2

    公开(公告)日:2022-06-07

    申请号:US16847258

    申请日:2020-04-13

    Abstract: This application provides a method for sending and receiving a clock synchronization packet in FlexE. The method includes: generating, by a sending apparatus, indication information and a plurality of data blocks, where the plurality of data blocks are obtained by encoding a first clock synchronization packet, the indication information is used to indicate a first data block, and the first data block is a data block used for timestamp sampling in the plurality of data blocks; determining, by the sending apparatus, according to the indication information, a moment at which the first data block arrives at a medium dependent interface MDI of the sending apparatus, and generating a sending timestamp, where the sending timestamp is used to record a sending moment of the first clock synchronization packet; generating a second clock synchronization packet carrying the sending timestamp; and sending, by the sending apparatus, the second clock synchronization packet.

    METHOD AND APPARATUS FOR SENDING AND RECEIVING CLOCK SYNCHRONIZATION PACKET

    公开(公告)号:US20220303035A1

    公开(公告)日:2022-09-22

    申请号:US17833862

    申请日:2022-06-06

    Abstract: This disclosure provides a method for sending and receiving a clock synchronization packet in FlexE. The method includes: generating, by a sending apparatus, indication information and a plurality of data blocks, where the plurality of data blocks are obtained by encoding a first clock synchronization packet, the indication information is used to indicate a first data block, and the first data block is a data block used for timestamp sampling in the plurality of data blocks; determining, by the sending apparatus, according to the indication information, a moment at which the first data block arrives at a medium dependent interface MDI of the sending apparatus, and generating a sending timestamp, where the sending timestamp is used to record a sending moment of the first clock synchronization packet; generating a second clock synchronization packet carrying the sending timestamp; and sending, by the sending apparatus, the second clock synchronization packet.

    Clock Synchronization Method and Apparatus

    公开(公告)号:US20210376943A1

    公开(公告)日:2021-12-02

    申请号:US17403131

    申请日:2021-08-16

    Abstract: A clock synchronization method includes receiving, by a receiving apparatus, a plurality of data blocks using a plurality of physical layer modules (PHYs), where the plurality of data blocks include a plurality of head data blocks, performing, by the receiving apparatus, timestamp sampling on the plurality of data blocks to generate a plurality of receipt timestamps, aligning, by the receiving apparatus, the plurality of receipt timestamps using a first receipt timestamp as a reference, generating, by the receiving apparatus, a clock synchronization packet based on the plurality of data blocks, and writing, by the receiving apparatus, a value of a second receipt timestamp into the clock synchronization packet, where the second receipt timestamp is a receipt timestamp that is of a second data block and that is determined based on the plurality of aligned receipt timestamps.

    Clock Synchronization Method and Apparatus
    8.
    发明申请

    公开(公告)号:US20200259578A1

    公开(公告)日:2020-08-13

    申请号:US16860688

    申请日:2020-04-28

    Abstract: A clock synchronization method includes receiving, by a receiving apparatus, a plurality of data blocks using a plurality of physical layer modules (PHYs), where the plurality of data blocks include a plurality of head data blocks, performing, by the receiving apparatus, timestamp sampling on the plurality of data blocks to generate a plurality of receipt timestamps, aligning, by the receiving apparatus, the plurality of receipt timestamps using a first receipt timestamp as a reference, generating, by the receiving apparatus, a clock synchronization packet based on the plurality of data blocks, and writing, by the receiving apparatus, a value of a second receipt timestamp into the clock synchronization packet, where the second receipt timestamp is a receipt timestamp that is of a second data block and that is determined based on the plurality of aligned receipt timestamps.

    Data Transmission Method in Flexible Ethernet and Device

    公开(公告)号:US20190281145A1

    公开(公告)日:2019-09-12

    申请号:US16392178

    申请日:2019-04-23

    Abstract: A data transmission method includes: obtaining multiple data blocks sent by L FlexE clients, L is greater than or equal to 1; and sending a data frame including the multiple data blocks to a physical-layer device, where a transmission rate of the data frame is N*100 Gbit/s, the data frame includes T data block groups, each of the T data block groups includes M continuous data block subgroups, each of the M continuous data block subgroups includes R*N continuous data blocks, the data frame further includes T overhead block groups, a tth overhead block group includes N continuous overhead blocks. According to the method, each data block subgroup in a data frame can include R*N data blocks, and each overhead block group can include N overhead blocks, and a data transmission rate can be adjusted flexibly.

    Communication Method and Device, and Chip System

    公开(公告)号:US20230388984A1

    公开(公告)日:2023-11-30

    申请号:US18446884

    申请日:2023-08-09

    CPC classification number: H04W72/0446 H04W72/12

    Abstract: A communication method and device, and a chip system adjust, by adjusting a quantity of slot resources included in a multiframe, a bandwidth resource corresponding to one multiframe. A first communication device sends a first request message. The first request message is used to request to adjust a quantity of basic frames in a multiframe included in a first block sequence. The first communication device multiplexes, based on S1 slot resources corresponding to the adjusted multiframe in the first block sequence, Q1 first block sequences corresponding to a slot resource in the S1 slot resources, to obtain and send the first block sequence.

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