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公开(公告)号:US20180166538A1
公开(公告)日:2018-06-14
申请号:US15631993
申请日:2017-06-23
Applicant: Hyundai Motor Company , Kia Motors Corporation
Inventor: NackYong JOO , Youngkyun JUNG , Junghee PARK , JongSeok LEE , Dae Hwan CHUN
IPC: H01L29/16 , H01L29/78 , H01L29/423 , H01L29/66
CPC classification number: H01L29/1608 , H01L29/4236 , H01L29/66015 , H01L29/66068 , H01L29/66712 , H01L29/7802 , H01L29/7813 , H01L29/7827
Abstract: A semiconductor device may include an n− type layer sequentially disposed at a first surface of an n+ type silicon carbide substrate; a p type region disposed in the n− type layer; an auxiliary n+ type region disposed on the p type region or in the p type region; an n+ type region disposed in the p type region; an auxiliary electrode disposed on the auxiliary n+ type region and the p type region; a gate electrode separated from the auxiliary electrode and disposed on the n− type layer; a source electrode separated from the auxiliary electrode and the gate electrode; and a drain electrode disposed at a second surface of the n+ type silicon carbide substrate, wherein the auxiliary n+ type region and the n+ type region are separated from each other, and the source electrode is in contact with the n+ type region.
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公开(公告)号:US20250006843A1
公开(公告)日:2025-01-02
申请号:US18517723
申请日:2023-11-22
Applicant: HYUNDAI MOTOR COMPANY , KIA CORPORATION
Inventor: Dae Hwan CHUN , Junghee PARK , Jungyeop HONG , Taehyun KIM , Youngkyun JUNG , NackYong JOO
Abstract: A semiconductor device includes a substrate, a buffer layer on the substrate, an n− type epitaxial layer extending upward from the buffer layer in one direction, and having a fin channel, a p type layer disposed on the buffer layer and surrounding the side and upper surfaces of the n− type epitaxial layer, a gate insulating layer on the p type layer, and a gate electrode on the gate insulating layer.
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公开(公告)号:US20180166539A1
公开(公告)日:2018-06-14
申请号:US15632077
申请日:2017-06-23
Applicant: Hyundai Motor Company , Kia Motors Corporation
Inventor: Dae Hwan CHUN , NackYong JOO
IPC: H01L29/16 , H01L29/78 , H01L29/423 , H01L29/66
CPC classification number: H01L29/1608 , H01L21/0445 , H01L29/41766 , H01L29/4236 , H01L29/66068 , H01L29/7802 , H01L29/7827 , H01L29/7839 , H01L51/105
Abstract: A semiconductor device may include an n− type layer disposed at a first surface of an n+ type silicon carbide substrate; a p− type region, a p type region, an n+ type region, and a p+ type region disposed at an upper portion in the n− type layer; a gate electrode and a source electrode disposed on the n− type layer and insulated from each other; and a drain electrode disposed at a second surface of the n+ type silicon carbide substrate, wherein the source electrode is in contact with the p− type region, the n+ type region, and the p+ type region, and the source electrode may include an ohmic junction region disposed at a contact portion of the source electrode and the n+ type region and the contact portion of the source region and the p+ type region and a Schottky junction region disposed at the contact portion of the source electrode and the p− type region.
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公开(公告)号:US20180012991A1
公开(公告)日:2018-01-11
申请号:US15348613
申请日:2016-11-10
Applicant: HYUNDAI MOTOR COMPANY
Inventor: NackYong JOO , Youngkyun JUNG , Junghee PARK , JongSeok LEE , Dae Hwan CHUN
CPC classification number: H01L29/7813 , H01L21/047 , H01L21/26586 , H01L29/1608 , H01L29/45 , H01L29/4916 , H01L29/66068
Abstract: A semiconductor device includes: an n− type layer disposed on a first surface of an n+ type silicon carbide substrate; a first trench and a second trench formed in the n− type layer and separated from each other; an n+ type region disposed between a side surface of the first trench and the side surface of the second trench and disposed on the n− type layer; a gate insulating layer disposed inside the first trench; a source insulating layer disposed inside the second trench; a gate electrode disposed on the gate insulating layer; an oxide layer disposed on the gate electrode; a source electrode disposed on the oxide layer, the n+ type region, and the source insulating layer; and a drain electrode disposed on a second surface of the n+ type silicon carbide substrate.
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公开(公告)号:US20240395923A1
公开(公告)日:2024-11-28
申请号:US18529864
申请日:2023-12-05
Applicant: HYUNDAI MOTOR COMPANY , KIA CORPORATION
Inventor: Dae Hwan CHUN , Junghee PARK , Jungyeop HONG , Taehyun KIM , Youngkyun JUNG , NackYong JOO
IPC: H01L29/778 , H01L23/31 , H01L29/24 , H01L29/40 , H01L29/423 , H01L29/66
Abstract: Provided are a semiconductor device and a method of manufacturing the same, the semiconductor device including a substrate, a buffer layer on the substrate, an n-type epitaxial layer on the buffer layer, a protective layer on the n-type epitaxial layer, a p type layer disposed in a trench structure on the protective layer, and penetrating the protective layer and within the n-type epitaxial layer, a gate insulating layer on the p type layer, and a gate electrode on the gate insulating layer.
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公开(公告)号:US20230207683A1
公开(公告)日:2023-06-29
申请号:US17748016
申请日:2022-05-18
Applicant: HYUNDAI MOTOR COMPANY , KIA CORPORATION
Inventor: Junghee PARK , Dae Hwan CHUN , Jungyeop HONG , Youngkyun JUNG , NackYong JOO
IPC: H01L29/78 , H01L21/265 , H01L21/266 , H01L29/66
CPC classification number: H01L29/7813 , H01L21/266 , H01L21/26586 , H01L29/66734
Abstract: A method for manufacturing a semiconductor device includes forming an N- type layer on the first surface of the N+ type substrate, etching the N- type layer to form a trench, forming a sacrificial layer on an inner bottom surface of the trench, forming a first mask on an inner side of the trench, removing the sacrificial layer, and forming a P type shield region by implanting ions into an inner surface of the trench exposed by the removal of the sacrificial layer.
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公开(公告)号:US20190341503A1
公开(公告)日:2019-11-07
申请号:US16165414
申请日:2018-10-19
Applicant: Hyundai Motor Company , Kia Motors Corporation
Inventor: Dae Hwan CHUN , NackYong JOO
IPC: H01L29/872 , H01L29/06 , H01L29/417 , H01L29/16 , H01L21/02 , H01L21/04 , H01L29/66 , H01L29/36
Abstract: A semiconductor device may include: an n type of layer disposed on a first surface of a substrate; a p+ type of region disposed on the first surface of the substrate; a p− type of region disposed at a top portion of the n type of layer; a first electrode disposed on the p+ type of region and the p− type of region; and a second electrode disposed on a second surface of the substrate, wherein the side surface of the p+ type of region and the side surface of the n type of layer are in contact, and the thickness of the p+ type of region is the same as the thickness of the n type of layer and the thickness of the p− type of region.
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公开(公告)号:US20180122911A1
公开(公告)日:2018-05-03
申请号:US15372078
申请日:2016-12-07
Applicant: HYUNDAI MOTOR COMPANY
Inventor: NackYong JOO , Youngkyun JUNG , Junghee PARK , JongSeok LEE , Dae Hwan CHUN
IPC: H01L29/40 , H01L29/06 , H01L21/761 , H01L21/765 , H01L29/16
CPC classification number: H01L29/402 , H01L21/761 , H01L21/765 , H01L29/0619 , H01L29/1608 , H01L29/7811 , H01L29/7813 , H01L29/7838 , H01L29/861 , H01L29/872
Abstract: A semiconductor device according to an exemplary embodiment of the present invention includes: a current applying region; and a termination region disposed at an end portion of the current applying region. The termination region includes: an n− type layer disposed on a first surface of an n+ type silicon carbide substrate; a p type termination structure disposed in the n− type layer; and a lower gate runner disposed on the p type termination structure such that the lower gate runner overlaps the p type termination structure.
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公开(公告)号:US20170170310A1
公开(公告)日:2017-06-15
申请号:US15165912
申请日:2016-05-26
Applicant: HYUNDAI MOTOR COMPANY
Inventor: Dae Hwan CHUN , Youngkyun JUNG , NackYong JOO , Junghee PARK , JongSeok LEE
CPC classification number: H01L29/7806 , H01L21/047 , H01L21/0495 , H01L29/0619 , H01L29/1608 , H01L29/41766 , H01L29/66068 , H01L29/7813 , H01L29/7828 , H01L29/872
Abstract: A semiconductor device includes an n− type layer disposed in a first surface of an n+ type silicon carbide substrate, a first trench and a second trench disposed in the n− type layer and spaced apart from each other, a p type region surrounding a lateral surface and a corner of the first trench, an n+ type region disposed on the p type region and the n− type layer between the first trench and the second trench, a gate insulating layer disposed in the second trench, a gate electrode disposed on the gate insulating layer, an oxide layer disposed on the gate electrode, a source electrode disposed on the oxide layer and the n+ type region, and disposed in the first trench, and a drain electrode disposed in a second surface of the n+ type silicon carbide substrate, wherein the source electrode contacts the n− type layer.
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