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    Method for forming a tantalum oxide capacitor using two-step rapid thermal nitridation
    3.
    发明授权
    Method for forming a tantalum oxide capacitor using two-step rapid thermal nitridation 有权
    使用两步快速热氮化形成氧化钽电容器的方法

    公开(公告)号：US06207488B1

    公开(公告)日：2001-03-27

    申请号：US09177841

    申请日：1998-10-22

    申请人： Ki-hyun Hwang ,  Jae-young Park ,  Jae-ho Byun

    发明人： Ki-hyun Hwang ,  Jae-young Park ,  Jae-ho Byun

    IPC分类号： H01L218242

    CPC分类号： H01L21/3211 ,  H01L21/31604 ,  H01L27/1085 ,  H01L28/56 ,  Y10S438/964

    摘要： A method for forming a Ta2O5 capacitor on a semiconductor device reduces leakage current and increases cell capacitance by utilizing a two-step rapid thermal nitridation (RTN) process to form a nitride layer on a hemi-spherical grain (HSG) storage node. The first RTN process is performed in a NH3 atmosphere at 800±40° C. for 180±60 seconds, thereby forming a nitride layer having a thickness of about 4 Å. The second RTN process is performed in a NH3 atmosphere at 850±40° C. for 180±60 seconds, thereby increasing the thickness of the nitride layer to at least about 7 Å. Therefore, a nitride layer that is thick enough to act as an oxidation barrier is achieved, but agglomeration of the HSGs on the storage node due to high process temperatures is prevented. To make the structure more readily adaptable to process for manufacturing DRAMs with Ta2O5 dielectric layers, a rapid thermal oxidation (RTO) process can then be performed in an O2 or N2O atmosphere at 850±50° C. for 90±30 seconds to thereby form a combined layer comprising a nitride layer and an oxide layer.

    摘要翻译： 在半导体器件上形成Ta2O5电容器的方法通过利用两步快速氮化（RTN）工艺在半球形晶粒（HSG）存储节点上形成氮化物层来减少漏电流并增加电池电容。 第一RTN工艺在NH 3气氛中在800±40℃下进行180±60秒，由此形成厚度约为的氮化物层。 第二个RTN工艺在NH 3气氛中在850±40℃下进行180±60秒，从而将氮化物层的厚度增加到至少约7埃。 因此，实现了足够厚以充当氧化屏障的氮化物层，但是防止了由于高的工艺温度而导致的存储节点上的HSG的聚集。 为了使结构更容易适应用于制造具有Ta 2 O 5介电层的DRAM的工艺，可以在850±50℃的O 2或N 2 O气氛中进行快速热氧化（RTO）处理90±30秒，从而形成 包括氮化物层和氧化物层的组合层。

    Methods of forming HSG capacitors from nonuniformly doped amorphous silicon layers and HSG capacitors formed thereby
    4.
    发明授权
    Methods of forming HSG capacitors from nonuniformly doped amorphous silicon layers and HSG capacitors formed thereby 失效
    由不均匀掺杂的非晶硅层和由此形成的HSG电容器形成HSG电容器的方法

    公开(公告)号：US06385020B1

    公开(公告)日：2002-05-07

    申请号：US09487740

    申请日：2000-01-19

    申请人： Hyun-bo Shin ,  Myeong-cheol Kim ,  Jin-won Kim ,  Ki-hyun Hwang ,  Jae-young Park ,  Bon-young Koo

    发明人： Hyun-bo Shin ,  Myeong-cheol Kim ,  Jin-won Kim ,  Ki-hyun Hwang ,  Jae-young Park ,  Bon-young Koo

    IPC分类号： H02H700

    CPC分类号： H01L27/10852 ,  H01L27/10817 ,  H01L28/84

    摘要： A hemispherical grain (HSG) capacitor having HSGs on at least a part of the surface of capacitor lower electrodes, and a method of forming the same. In the capacitor, lower electrodes are formed of at least two amorphous silicon layers including an amorphous silicon layer doped with a high concentration of impurities and an amorphous silicon layer doped with a low concentration of impurities, and HSGs are formed, wherein the size of the hemispherical grains can be adjusted such that the size of HSGs formed on the inner surface of a U-shaped lower electrode or on the top of a stacked lower electrode is larger than that of HSGs formed on the outer surface of the U-shaped lower electrode or on the sidews of the stacked lower electrode. Thus, bridging between neighboring lower electrodes can be avoided by appropriately adjusting the size of HSGs, resulting in uniform capacitance wafer-to-wafer and within a wafer. The mechanical strength of the U-shaped lower electrode can also be enhanced.

    摘要翻译： 在电容器下电极的表面的至少一部分上具有HSG的半球状晶粒（HSG）电容器及其形成方法。 在电容器中，下电极由至少两个非晶硅层形成，包括掺杂有高浓度杂质的非晶硅层和掺杂有低浓度杂质的非晶硅层，形成HSG， 可以调节半球形颗粒，使得形成在U形下电极的内表面上或堆叠的下电极的顶部上的HSG的尺寸大于形成在U形下电极的外表面上的HSG的尺寸 或在堆叠的下电极的侧面上。 因此，可以通过适当地调节HSG的尺寸来避免相邻的下部电极之间的桥接，导致晶片到晶片和晶片内的均匀电容。 也可以提高U形下电极的机械强度。