摘要:
Photonic passivation layers, III-V semiconductor die with offcut edges, and NiGe contact metallization for silicon-based photonic integrated circuits (PICs). In embodiments, a non-sacrificial passivation layer is formed on a silicon photonic element, such as a waveguide for protection of the waveguide surfaces. In embodiments, a III-V semiconductor film is transferred from a III-V growth substrate that is singulated along streets that are misaligned from cleave planes to avoid crystallographic etch artifacts in a layer transfer process. In embodiments, a NiGe contact metallization is employed for both p-type and n-type contacts on a device formed in the transferred III-V semiconductor layer to provide low specific contact resistance and compatibility with MOS processes.
摘要:
Described herein is a hybrid III-V Silicon laser comprising a first semiconductor region including layers of semiconductor materials from group III, group IV, or group V semiconductor to form an active region; and a second semiconductor region having a silicon waveguide and bonded to the first semiconductor region via direct bonding at room temperature of a layer of the first semiconductor region to a layer of the second semiconductor region.
摘要:
In a Micro Electro-Mechanical System (MEMS) switch, a common switch failure is a short between the upper and the lower electrostatic actuation plates. Such shorts may occur due to torque deformation. Stopper bumps having a slightly lower height profile than that of the contact bumps are provided to prevent such shorts. The stopper bumps may be made using the same mask as that used to create the contact bump with the height of the respective bumps controlled by determining the diameter of the bumps.
摘要:
An electromechanical switch includes an actuation electrode, an anchor, a cantilever electrode, a contact, and signal lines. The actuation electrode and anchor are mounted to a substrate. The cantilever electrode is supported by the anchor above the actuation electrode. The contact is mounted to the cantilever electrode. The signal lines are positioned to form a closed circuit with the contact when an actuation voltage is applied between the actuation electrode and the cantilever electrode causing the cantilever electrode to bend towards the actuation electrode in a zipper like movement starting from a distal end of the cantilever electrode.
摘要:
Described herein is a hybrid III-V Silicon laser comprising a first semiconductor region including layers of semiconductor materials from group III, group IV, or group V semiconductor to form an active region; and a second semiconductor region having a silicon waveguide and bonded to the first semiconductor region via direct bonding at room temperature of a layer of the first semiconductor region to a layer of the second semiconductor region.
摘要:
An electromechanical switch includes an actuation electrode, an anchor, a cantilever electrode, a contact, and signal lines. The actuation electrode and anchor are mounted to a substrate. The cantilever electrode is supported by the anchor above the actuation electrode. The contact is mounted to the cantilever electrode. The signal lines are positioned to form a closed circuit with the contact when an actuation voltage is applied between the actuation electrode and the cantilever electrode causing the cantilever electrode to bend towards the actuation electrode in a zipper like movement starting from a distal end of the cantilever electrode.
摘要:
In a Micro Electro-Mechanical System (MEMS) switch, a common switch failure is a short between the upper and the lower electrostatic actuation plates. Such shorts may occur due to torque deformation. Stopper bumps having a slightly lower height profile than that of the contact bumps are provided to prevent such shorts. The stopper bumps may be made using the same mask as that used to create the contact bump with the height of the respective bumps controlled by determining the diameter of the bumps.
摘要:
Embodiments described herein may be related to apparatuses, processes, and techniques related to coherent optical receivers, including coherent receivers with integrated all-silicon waveguide photodetectors and tunable local oscillators implemented within CMOS technology. Embodiments are also directed to tunable silicon hybrid lasers with integrated temperature sensors to control wavelength. Embodiments are also directed to post-process phase correction of optical hybrid and nested I/Q modulators. Embodiments are also directed to demultiplexing photodetectors based on multiple microrings. In embodiments, all components may be implements on a silicon substrate. Other embodiments may be described and/or claimed.
摘要:
Inverted 45° semiconductor mirrors as vertical optical couplers for PIC chips, particularly optical receivers and transmitters. An inverted 45° semiconductor mirror functions to couple light between a plane in the PIC chip defined by thin film layers and a direction normal to a top surface of the PIC chip where it may be generated or collected by an off-chip component, such as a wire terminal. In an exemplary embodiment, a (110) plane of a cubic crystalline semiconductor may provide a 45° facet inverted relative to a (100) surface of the semiconductor from which light is to be emitted. In further embodiments, a (110) plane may be exposed by undercutting a device layer of a semiconductor on insulator (SOI) substrate. Alternatively, a pre-etched substrate surface may be bonded to a handling wafer, thinned, and then utilized for PIC waveguide formation.
摘要:
Embodiments of a process comprising forming one or more micro-electro-mechanical (MEMS) probe on a conductive metal oxide semiconductor (CMOS) wafer, wherein each MEMS probe comprises a cantilever beam with a fixed end and a free end and wherein the CMOS wafer has circuitry thereon; forming an unsharpened tip at or near the free end of each cantilever beam; depositing a silicide-forming material over the tip; annealing the wafer to sharpen the tip; and exposing the sharpened tip. Embodiments of an apparatus comprising a conductive metal oxide semiconductor (CMOS) wafer including circuitry therein; one or more micro-electro-mechanical (MEMS) probes integrally formed on the CMOS wafer, wherein each MEMS probe comprises a cantilever beam with a fixed end and a free end and a sharpened tip at or near the free end, the sharpened tip formed by a process comprising forming an unsharpened tip at or near the free end of each cantilever beam, depositing a silicide-forming material over the unsharpened tip, annealing the wafer to sharpen the unsharpened tip, and exposing the sharpened tip.