公开(公告)号：US06459949B1

公开(公告)日：2002-10-01

申请号：US09176537

申请日：1998-10-21

申请人： Hang T. Black ,  Arturo N. Morosoff ,  Joseph Lebowitz

发明人： Hang T. Black ,  Arturo N. Morosoff ,  Joseph Lebowitz

IPC分类号： G06F1900

CPC分类号： G05B19/41875 ,  G05B2219/31365 ,  G05B2219/32214 ,  Y02P90/12 ,  Y02P90/22 ,  Y10S707/99945 ,  Y10S707/99948 ,  Y10S707/99953

摘要： A system and method for recording and addressing out of control (OOC) events in a semiconductor processing line. The method includes steps of (a) opening OOC entries in an OOC database, and (b) working the OOC entries. Opening an OOC entry is performed in response to one or more OOC events in wafer lots being processed in the semiconductor processing line. A lot record addresses an isolated occurrence pertaining to one wafer lot. An issue record addresses a trend of repeated defects or failures. Opening an OOC entry in the OOC database preferably includes assigning and recording an “owner” responsible for addressing the OOC entry. Working the OOC entries includes opening activity records for the OOC entries, receiving user input on corrective measures, and recording the measures in the activity records. The method preferably also includes steps of (c) closing OOC entries after working the OOC entries, and (d) reassigning OOC entries if ownership is transferred for the entries. The system includes (a) a plurality of computer systems, including a plurality of entry terminals, (b) an OOC database coupled to the plurality of computer systems, (c) an OOC interface executing on one or more of the entry terminals and coupled to the OOC database, and (d) an OOC tracking program executing on one or more of the computer systems and coupled to the OOC database and to the OOC interface.

摘要翻译： 一种用于在半导体处理线中记录和寻址失控（OOC）事件的系统和方法。 该方法包括以下步骤：（a）在OOC数据库中打开OOC条目，以及（b）处理OOC条目。 响应于在半导体处理线中处理的晶片批次中的一个或多个OOC事件来执行打开OOC条目。 许多记录解决了与一个晶圆批次有关的孤立事件。 问题记录解决了重复缺陷或失败的趋势。 在OOC数据库中打开OOC条目最好包括分配和记录负责处理OOC条目的“所有者”。 工作OOC条目包括打开OOC条目的活动记录，接收用户对纠正措施的输入，并将措施记录在活动记录中。 该方法优选还包括（c）在工作OOC条目之后关闭OOC条目的步骤，以及（d）如果所有权转移给条目，则重新分配OOC条目。 该系统包括（a）多个计算机系统，包括多个入口终端，（b）耦合到多个计算机系统的OOC数据库，（c）在一个或多个入口终端上执行的OOC接口， 到OOC数据库，以及（d）在一个或多个计算机系统上执行的OOC跟踪程序，并且耦合到OOC数据库和OOC接口。

公开(公告)号：US06649541B1

公开(公告)日：2003-11-18

申请号：US09920490

申请日：2001-08-01

申请人： Allen Lewis Evans ,  David E. Brown ,  Michael J. Satterfield ,  Arturo N. Morosoff

发明人： Allen Lewis Evans ,  David E. Brown ,  Michael J. Satterfield ,  Arturo N. Morosoff

IPC分类号： H01L21469

CPC分类号： H01L21/02274 ,  C23C16/402 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/31612 ,  H01L21/76801 ,  H01L21/76829

摘要： The method disclosed herein provides a semiconducting substrate, positioning the substrate in a high density plasma process chamber, and forming a layer of silicon-rich silicon dioxide above the substrate using a high density plasma process with an oxygen/silane flowrate ratio that is less than or equal to 0.625. In another embodiment, the method provides a semiconducting substrate having a partially formed integrated circuit device formed thereabove, the integrated circuit device having a plurality of conductive interconnections, e.g., conductive lines or conductive plugs, formed thereon, and positioning the substrate in a high density plasma process chamber. The method further includes forming a first layer of silicon dioxide between the plurality of conductive interconnections using a high density plasma process with an oxygen/silane flowrate ratio less than 1.0, and forming a layer of insulating material above the first layer between the conductive interconnections. In another aspect of the present invention, an integrated circuit device has of a plurality of conductive interconnections, e.g., conductive lines, formed above a semiconducting substrate, a layer of silicon dioxide having a silicon content ranging from approximately 50-75 weight percent positioned between the conductive inter-connections, and a layer of insulating material positioned above the layer of silicon dioxide between the conductive interconnections.

摘要翻译： 本文公开的方法提供半导体衬底，将衬底定位在高密度等离子体处理室中，并且使用氧/硅烷流量比小于等于的高密度等离子体工艺在衬底上形成富硅二氧化硅层 或等于0.625。 在另一个实施例中，该方法提供了一种半导体衬底，其具有形成在其上面的部分形成的集成电路器件，该集成电路器件具有多个导电互连，例如在其上形成的导电线或导电插塞，并且将衬底以高密度 等离子体处理室。 该方法还包括使用氧/硅烷流量比小于1.0的高密度等离子体工艺在多个导电互连之间形成第二层二氧化硅，以及在导电互连之间在第一层之上形成一层绝缘材料。 在本发明的另一方面，集成电路器件具有形成在半导体衬底上方的多个导电互连（例如，导线），二氧化硅层的硅含量范围为约50-75重量％ 导电互连，以及位于导电互连之间的二氧化硅层之上的绝缘材料层。