Process for producing a thin metal structure with a self-supporting frame
    2.
    发明授权
    Process for producing a thin metal structure with a self-supporting frame 失效
    用于生产具有自支撑框架的薄金属结构的方法

    公开(公告)号:US4058432A

    公开(公告)日:1977-11-15

    申请号:US667531

    申请日:1976-03-17

    IPC分类号: C23F1/00 C25D1/08 H01L21/312

    CPC分类号: C25D1/08 Y10T29/4962

    摘要: A process for producing a thin metal structure with a self-supporting frame, such as a grid, characterized by forming a galvanic resistant coating on a first surface of a carrier member with the coating exposing portions of the first surface adjacent the end of the carrier member and portions of the first surface in the configuration of the metal structure to be formed, depositing a layer of metal on the exposed portion of the first surface, removing the galvanic resistant coating, applying an etch resistant coating on the edges of thecarrier member and at least a portion of a second surface adjacent the edges of the carrier member and then selectively etching the carrier member to remove the carrier member except for that portion protected by the etch resistant coating to form the thin metal structure mounted on a self-supporting frame. The carrier member may either be a single member or a multi-layer member which has a metal coating forming the first surface. The process when using a multi-layer includes providing a protective layer on the metal structure and etching away the majority of the carrier member and then subsequently etching the metallic layer and protective layer to produce the metal structure on the frame.

    摘要翻译: 一种用于制造具有诸如栅格的自支撑框架的薄金属结构的方法,其特征在于在载体构件的第一表面上形成耐电镀涂层,其中第一表面的涂层暴露部分邻近载体的端部 构件和要形成的金属结构的构造中的第一表面的部分,在第一表面的暴露部分上沉积金属层,去除耐电镀涂层,在载体构件的边缘上施加耐蚀刻涂层,以及 第二表面的至少一部分邻近载体构件的边缘,然后选择性地蚀刻载体构件以去除除了由耐蚀刻涂层保护的部分之外的载体构件,以形成安装在自支撑框架上的薄金属结构 。 载体构件可以是具有形成第一表面的金属涂层的单个构件或多层构件。 当使用多层时的过程包括在金属结构上提供保护层并蚀刻掉大部分载体构件,然后随后蚀刻金属层和保护层以在框架上产生金属结构。

    MRAM memory with drive logic arrangement
    3.
    发明授权
    MRAM memory with drive logic arrangement 有权
    具有驱动逻辑布置的MRAM存储器

    公开(公告)号:US06462980B2

    公开(公告)日:2002-10-08

    申请号:US09832106

    申请日:2001-04-11

    IPC分类号: G11C1100

    摘要: MRAM memory having a memory cell array (2) comprising magnetoresistive memory components (6a, 6b) arranged in at least one memory cell layer above a semiconductor substrate (4), word lines (7) and bit lines (8, 9) for making contact with the magnetoresistive memory components (6a, 6b) in the memory cell array (2); and having a drive logic arrangement (5a, 5b, 5c) for driving the magnetoresistive memory components (6a, 6b) in the memory cell array (2) via the word and bit lines (7, 8, 9), the drive logic arrangement (5a, 5b, 5c) being integrated below the memory cell array (2) in and on the semiconductor substrate (4).

    摘要翻译: MRAM存储器具有存储单元阵列(2),包括布置在半导体衬底(4)上方的至少一个存储单元层中的磁阻存储器组件(6a,6b),字线(7)和位线(8,9) 与存储单元阵列(2)中的磁阻存储器组件(6a,6b)接触; 并具有用于经由字线和位线(7,8,9)驱动存储单元阵列(2)中的磁阻存储器组件(6a,6b)的驱动逻辑装置(5a,5b,5c),驱动逻辑装置 (5a,5b,5c)集成在所述半导体衬底(4)中的所述存储单元阵列(2)的下方。