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    Device with reconfigurable continuous and discrete time functionality
    1.
    发明授权
    Device with reconfigurable continuous and discrete time functionality 有权
    具有可重构连续和离散时间功能的设备

    公开(公告)号：US08111097B1

    公开(公告)日：2012-02-07

    申请号：US12762207

    申请日：2010-04-16

    申请人： Harold Kutz ,  Warren Snyder ,  Monte Mar ,  Dennis Seguine ,  Gajender Rohilla ,  Eashwar Thiagarajan

    发明人： Harold Kutz ,  Warren Snyder ,  Monte Mar ,  Dennis Seguine ,  Gajender Rohilla ,  Eashwar Thiagarajan

    IPC分类号： H04B1/60

    CPC分类号： H03K25/04

    摘要： A programmable system includes a programmable analog device including an operational amplifier to generate an output voltage based on input voltages at terminals of the operational amplifier. The programmable system also includes a system controller to direct the programmable analog device to reconfigure analog circuitry providing the input voltages to the operational amplifier. The reconfiguration of the analog circuitry allows the programmable analog device to implement discrete-time or continuous-time functions.

    摘要翻译： 可编程系统包括可编程模拟装置，其包括运算放大器，以基于运算放大器端子处的输入电压产生输出电压。 可编程系统还包括系统控制器，用于引导可编程模拟装置重新配置向运算放大器提供输入电压的模拟电路。 模拟电路的重新配置允许可编程模拟设备实现离散时间或连续时间功能。

    Device with reconfigurable continuous and discrete time functionality
    2.
    发明授权
    Device with reconfigurable continuous and discrete time functionality 有权
    具有可重构连续和离散时间功能的设备

    公开(公告)号：US08299850B1

    公开(公告)日：2012-10-30

    申请号：US13367690

    申请日：2012-02-07

    申请人： Harold Kutz ,  Warren Snyder ,  Monte Mar ,  Dennis Seguine ,  Gajender Rohilla ,  Eashwar Thiagarajan

    发明人： Harold Kutz ,  Warren Snyder ,  Monte Mar ,  Dennis Seguine ,  Gajender Rohilla ,  Eashwar Thiagarajan

    IPC分类号： H03F1/02

    CPC分类号： H03K25/04

    摘要： A programmable device includes an operational amplifier and circuitry. The operational amplifier is configured to generate an output voltage based on input voltages at input terminals thereof. The circuitry is configured to provide the input voltages to the operational amplifier. The configuration of the circuitry allows the programmable device to implement discrete-time or continuous-time functions. The circuitry includes a resistor network and a capacitor network configured to be selectively coupled to the operational amplifier.

    摘要翻译： 可编程器件包括运算放大器和电路。 运算放大器被配置为基于其输入端子处的输入电压产生输出电压。 电路被配置为向运算放大器提供输入电压。 电路的配置允许可编程器件实现离散时间或连续时间功能。 该电路包括电阻器网络和被配置为选择性地耦合到运算放大器的电容器网络。

    Programmable buffer circuit
    7.
    发明授权
    Programmable buffer circuit 有权
    可编程缓冲电路

    公开(公告)号：US08941410B1

    公开(公告)日：2015-01-27

    申请号：US13303105

    申请日：2011-11-22

    申请人： Gajender Rohilla ,  Eashwar Thiagarajan ,  Harold Kutz ,  Monte Mar ,  Mohandas Palatholmana Sivadasan

    发明人： Gajender Rohilla ,  Eashwar Thiagarajan ,  Harold Kutz ,  Monte Mar ,  Mohandas Palatholmana Sivadasan

    IPC分类号： H03K19/0175 ,  H03K17/00

    CPC分类号： H03K19/018585 ,  H03F3/387 ,  H03F3/45183 ,  H03M1/124 ,  H03M1/129

    摘要： Buffer circuit embodiments are described. A buffer circuit includes an input configured to receive an input signal and a buffer configured to generate an output signal based on the input signal. In one embodiment, the buffer circuit includes a programmable chopping module coupled with the buffer, wherein the programmable chopping module is programmable with a selected configuration from a plurality of configurations, and wherein the programmable chopping modulates the input signal based on the selected configuration. In another embodiment, the buffer circuit further includes a programmable output filter coupled with the buffer, wherein the programmable output filter is programmable with a selected configuration form a plurality of configurations, and wherein the programmable output filter filters a frequency band of the output signal based on the selected configuration.

    摘要翻译： 描述缓冲电路实施例。 缓冲电路包括被配置为接收输入信号的输入和被配置为基于输入信号产生输出信号的缓冲器。 在一个实施例中，缓冲电路包括与缓冲器耦合的可编程斩波模块，其中可编程斩波模块可根据多种配置以选定的配置进行编程，并且其中可编程斩波基于所选择的配置来调制输入信号。 在另一个实施例中，缓冲电路还包括与缓冲器耦合的可编程输出滤波器，其中可编程输出滤波器可以由多个配置形式的选定配置编程，并且其中可编程输出滤波器基于输出信号的频带 对所选配置。

    Programmable buffer circuit
    8.
    发明授权
    Programmable buffer circuit 有权
    可编程缓冲电路

    公开(公告)号：US08063665B1

    公开(公告)日：2011-11-22

    申请号：US12496612

    申请日：2009-07-01

    申请人： Gajender Rohilla ,  Eashwar Thiagarajan ,  Harold Kutz ,  Monte Mar ,  Mohandas Palatholmana Sivadasan

    发明人： Gajender Rohilla ,  Eashwar Thiagarajan ,  Harold Kutz ,  Monte Mar ,  Mohandas Palatholmana Sivadasan

    IPC分类号： H03K19/0175

    CPC分类号： H03K19/018585 ,  H03F3/387 ,  H03F3/45183 ,  H03M1/124 ,  H03M1/129

    摘要： A buffer circuit includes an input configured to receive an input signal; and a buffer configured to generate an output signal based on the input signal. In an embodiment, the output signal has a linear relationship with the input signal when the input signal is within the input voltage range; and the buffer circuit further includes a level-shifting circuit coupled with the input, wherein the level shifting circuit determines an input voltage range, and wherein one of an upper limit and a lower limit of the input voltage range is within 50 millivolts from a supply rail voltage. In another embodiment, the buffer circuit further includes a programmable chopping module coupled with the buffer, wherein the programmable chopping module is programmable with a selected configuration from a plurality of configurations, and wherein the programmable chopping modulates the input signal based on the selected configuration. In yet another embodiment, the buffer circuit further includes a programmable output filter coupled with the buffer, wherein the programmable output filter is programmable with a selected configuration from a plurality of configurations, and wherein the programmable output filter filters a frequency band of the output signal based on the selected configuration.

    摘要翻译： 缓冲电路包括被配置为接收输入信号的输入; 以及配置为基于所述输入信号生成输出信号的缓冲器。 在一个实施例中，当输入信号在输入电压范围内时，输出信号与输入信号具有线性关系; 并且所述缓冲电路还包括与所述输入端耦合的电平移动电路，其中所述电平移位电路确定输入电压范围，并且其中所述输入电压范围的上限和下限之一在电源的50毫伏之内 轨电压。 在另一个实施例中，缓冲电路还包括与缓冲器耦合的可编程斩波模块，其中可编程斩波模块可根据多种配置以选定的配置进行编程，并且其中可编程斩波基于所选择的配置来调制输入信号。 在另一个实施例中，缓冲电路还包括与缓冲器耦合的可编程输出滤波器，其中可编程输出滤波器可根据多种配置以选定的配置进行编程，并且其中可编程输出滤波器对输出信号的频带进行滤波 基于所选配置。