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公开(公告)号：US09271072B2
公开(公告)日：2016-02-23
申请号：US14300568
申请日：2014-06-10
发明人： Thomas Nötzold
摘要： An analog input module includes an activation unit, an analog/digital converter, an input circuit with a first input and a second input and a voltage divider disposed between the first input and the second input. The activation unit is connected to the first input and the second input and is connected upstream of the analog/digital converter. The voltage divider has center tap which is connected to a first comparator input of a comparator of a closed-loop control unit. The closed-loop control unit has a switching device disposed between the second input and a reference point. The comparator includes a second comparator input which is connected to a reference source. The comparator has a control output which is connected to a control input of the switching device. The closed-loop control unit is configured such that the switching device enables or disables a current path to the reference point.
摘要翻译： 模拟输入模块包括激活单元，模拟/数字转换器，具有第一输入和第二输入的输入电路以及设置在第一输入和第二输入之间的分压器。 激活单元连接到第一输入端和第二输入端，并连接在模拟/数字转换器的上游。 分压器具有连接到闭环控制单元的比较器的第一比较器输入的中心抽头。 闭环控制单元具有设置在第二输入和参考点之间的开关装置。 比较器包括连接到参考源的第二比较器输入。 比较器具有连接到开关装置的控制输入的控制输出。 闭环控制单元被配置为使得开关装置启用或禁用到参考点的当前路径。
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2.发明授权公开(公告)号：US09160320B2
公开(公告)日：2015-10-13
申请号：US14035782
申请日：2013-09-24
申请人： Eduard Roytman , Jian Xu , Rahul Shah , Kambiz R. Munshi , Ronald L. Bedard , Mahalingam Nagarajan
发明人： Eduard Roytman , Jian Xu , Rahul Shah , Kambiz R. Munshi , Ronald L. Bedard , Mahalingam Nagarajan
CPC分类号： H03K5/086 , H03K5/1565 , H03M1/004 , H03M1/126 , H03M1/50
摘要： Described herein are an apparatus, system, and method for compensating voltage swing and duty cycle of a signal on an input-output (I/O) pad of a processor by adjusting the voltage swing and duty cycle of the signal. The apparatus comprises a driver to transmit a signal on an I/O pad, the signal on the I/O pad having a voltage swing and a duty cycle; and an adjustment unit, coupled to the driver, to receive the signal from the I/O pad transmitted by the driver and to generate voltage swing and duty cycle control signals for adjusting the voltage swing and duty cycle of the signal on the I/O pad respectively. Described herein is also an analog-to-digital (A2D) converter for measuring and/or calibrating various signal attributes including current, voltage, and time.
摘要翻译： 这里描述了一种用于通过调整信号的电压摆幅和占空比来补偿处理器的输入输出（I / O）焊盘上的信号的电压摆幅和占空比的装置，系统和方法。 该装置包括用于在I / O焊盘上传输信号的驱动器，I / O焊盘上的信号具有电压摆幅和占空比; 以及耦合到驱动器的调整单元，用于接收由驱动器发送的I / O焊盘的信号，并产生用于调整I / O上信号的电压摆幅和占空比的电压摆幅和占空比控制信号 垫分别。 这里描述的也是用于测量和/或校准包括电流，电压和时间的各种信号属性的模数（A2D）转换器。
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公开(公告)号：US20140363031A1
公开(公告)日：2014-12-11
申请号：US14300568
申请日：2014-06-10
发明人： Thomas Nötzold
IPC分类号： H04R3/00
摘要： An analog input module includes an activation unit, an analog/digital converter, an input circuit with a first input and a second input and a voltage divider disposed between the first input and the second input. The activation unit is connected to the first input and the second input and is connected upstream of the analog/digital converter. The voltage divider has center tap which is connected to a first comparator input of a comparator of a closed-loop control unit. The closed-loop control unit has a switching device disposed between the second input and a reference point. The comparator includes a second comparator input which is connected to a reference source. The comparator has a control output which is connected to a control input of the switching device. The closed-loop control unit is configured such that the switching device enables or disables a current path to the reference point.
摘要翻译： 模拟输入模块包括激活单元，模拟/数字转换器，具有第一输入和第二输入的输入电路以及设置在第一输入和第二输入之间的分压器。 激活单元连接到第一输入端和第二输入端，并连接在模拟/数字转换器的上游。 分压器具有连接到闭环控制单元的比较器的第一比较器输入的中心抽头。 闭环控制单元具有设置在第二输入和参考点之间的开关装置。 比较器包括连接到参考源的第二比较器输入。 比较器具有连接到开关装置的控制输入的控制输出。 闭环控制单元被配置为使得开关装置启用或禁用到参考点的当前路径。
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公开(公告)号：US08125359B2
公开(公告)日：2012-02-28
申请号：US12819561
申请日：2010-06-21
申请人： Shigeo Imai
发明人： Shigeo Imai
IPC分类号： H03M1/06
CPC分类号： H03M1/004 , H03M1/0658 , H03M1/1215
摘要： According to an embodiment, an analog-to-digital converter (ADC) including an ADC unit, a clock-phase control unit, a multiplexer, and a digital-output processing unit is provided. The digital-output processing unit inputs digital outputs of the ADC unit to either an averaging circuit or the multiplexer depending on the specified conversion speed and the specified conversion accuracy, or inputs the digital outputs of the ADC unit to the averaging circuit and the multiplexer in this order, and outputs ADC digital signals with the specified conversion speed and the specified conversion accuracy.
摘要翻译： 根据实施例，提供了包括ADC单元，时钟相位控制单元，多路复用器和数字输出处理单元的模数转换器（ADC）。 数字输出处理单元根据指定的转换速度和指定的转换精度，将ADC单元的数字输出输入到平均电路或多路复用器，或者将ADC单元的数字输出输入到平均电路和多路复用器 该命令，并以指定的转换速度和指定的转换精度输出ADC数字信号。
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5.发明授权Apparatus and method for dynamic circuit element selection in an digital-to-analog converter 有权用于数模转换器中动态电路元件选择的装置和方法公开(公告)号：US07868806B2
公开(公告)日：2011-01-11
申请号：US12044399
申请日：2008-03-07
IPC分类号： H03M3/00
CPC分类号： H03M1/004 , H03M1/066 , H03M1/0665 , H03M1/0673 , H03M1/74 , H03M3/502
摘要： According to at least one embodiment of the invention, an apparatus may include first, second and third circuits. The first circuit receives input data and provides a plurality of first signals asserted based on the input data. The second circuit receives the plurality of first signals and provides a plurality of second signals used to select a plurality of circuit elements. The third circuit generates a control for the second circuit using a fractional data weight of the input data, the second circuit mapping the plurality of first signals to the plurality of second signals based on the control from the third circuit.
摘要翻译： 根据本发明的至少一个实施例，装置可以包括第一，第二和第三电路。 第一电路接收输入数据并提供基于输入数据而断言的多个第一信号。 第二电路接收多个第一信号并提供用于选择多个电路元件的多个第二信号。 第三电路使用输入数据的分数数据权重产生第二电路的控制，第二电路基于来自第三电路的控制将多个第一信号映射到多个第二信号。
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6.发明授权公开(公告)号：US07733255B2
公开(公告)日：2010-06-08
申请号：US11679654
申请日：2007-02-27
申请人： Volker Christ
发明人： Volker Christ
摘要： Embodiments of a digital-to-analog converter (DAC) with a logarithmic response and methods for converting digital signals to analog are generally described herein. Other embodiments may be described and claimed. In some embodiments, the DAC includes a wedge-shaped resistive array having a plurality of linearly-spaced contact nodes and a switching array to selectively couple one of the contact nodes with an analog output based on a control signal. Each of the contact nodes may provide a corresponding reference voltage that varies logarithmically with respect to the linearly-spaced contact nodes.
摘要翻译： 具有对数响应的数模转换器（DAC）和用于将数字信号转换为模拟的方法的实施例一般地在此描述。 可以描述和要求保护其他实施例。 在一些实施例中，DAC包括具有多个线性间隔接触节点的楔形电阻阵列和用于基于控制信号选择性地将接触节点之一与模拟输出耦合的开关阵列。 每个接触节点可以提供相对于线性间隔的接触节点对数变化的对应参考电压。
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公开(公告)号：US20100097259A1
公开(公告)日：2010-04-22
申请号：US12574586
申请日：2009-10-06
申请人： Hongxuan Zhang
发明人： Hongxuan Zhang
IPC分类号： H03M1/12
CPC分类号： H03M1/127 , A61B5/0402 , G06F19/00 , H03M1/004 , H03M1/1215
摘要： A patient monitoring signal processing system adaptively varies medical signal data rate. The system uses an analog to digital converter for digitizing an analog cyclically varying input signal derived from a patient in response to a sampling clock input. The sampling clock determines frequency of analog to digital sampling of the analog input signal by the analog to digital converter. A detector detects first and second different signal portions within a cycle of the cyclically varying input signal. A control processor coupled to the analog to digital converter and the detector, provides the sampling clock and adaptively determines first and second different frequencies of the sampling clock to be used in sampling within detected corresponding first and second different signal portions of the cyclically varying input signal in response to predetermined information indicating a frequency of a signal component of the cyclically varying input signal in the first signal portion is higher than a frequency of a signal component of the cyclically varying input signal in the second signal portion. Also the first frequency is higher than the second frequency of the first and second different frequencies.
摘要翻译： 患者监护信号处理系统自适应地改变医疗信号数据速率。 系统使用模数转换器来响应于采样时钟输入数字化从患者得到的模拟周期性变化的输入信号。 采样时钟决定模数转换器模拟输入信号的模拟数字采样频率。 检测器在周期性变化的输入信号的周期内检测第一和第二不同的信号部分。 耦合到模数转换器和检测器的控制处理器提供采样时钟并且自适应地确定要在循环变化的输入信号的检测到的对应的第一和第二不同信号部分内的采样中使用的采样时钟的第一和第二不同频率 响应于指示第一信号部分中循环变化的输入信号的信号分量的频率的预定信息高于第二信号部分中循环变化的输入信号的信号分量的频率。 此外，第一频率高于第一和第二不同频率的第二频率。
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公开(公告)号：US07656340B2
公开(公告)日：2010-02-02
申请号：US12134523
申请日：2008-06-06
申请人： Sergey Gribok , Choshu Ito , William Loh , Erik Chmelar
发明人： Sergey Gribok , Choshu Ito , William Loh , Erik Chmelar
IPC分类号： H03M1/38
摘要： Various embodiments of the present invention provide systems and methods for analog to digital conversion. For example, a pipelined analog to digital converter is disclosed that includes two or more comparators. A first of the comparators is operable to compare an analog input to a first voltage reference upon assertion of the first clock, and a second of the comparators is operable to compare the analog input to a second voltage reference upon assertion of the second clock. The pipelined analog to digital converters further include a multiplexer tree with at least a first tier multiplexer and a second tier multiplexer. The first tier multiplexer receives an output of the first comparator and an output of the second comparator, and the second tier multiplexer receives an output derived from the first tier multiplexer. The second tier multiplexer provides an output bit. A bit enable set is used as a selector input to the first tier multiplexer and the second tier multiplexer, and the bit enable set includes one or more output bits from preceding bit periods.
摘要翻译： 本发明的各种实施例提供了用于模数转换的系统和方法。 例如，公开了一种流水线模数转换器，其包括两个或更多个比较器。 比较器中的第一个可操作以在断言第一时钟时将模拟输入与第一参考电压进行比较，并且第二比较器可用于在断言第二时钟时将模拟输入与第二参考电压进行比较。 流水线模数转换器还包括具有至少第一层多路复用器和第二层多路复用器的复用器树。 第一层多路复用器接收第一比较器的输出和第二比较器的输出，并且第二层多路复用器接收从第一层多路复用器导出的输出。 第二层复用器提供输出位。 位使能集合用作对第一层多路复用器和第二层多路复用器的选择器输入，并且位使能集包括来自先前位周期的一个或多个输出位。
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公开(公告)号：US20100001793A1
公开(公告)日：2010-01-07
申请号：US12518160
申请日：2007-12-05
IPC分类号： H03F3/16
CPC分类号： H03M1/004 , H03F1/0227 , H03M1/745
摘要： A high efficiency modulating RF amplifier (10) for amplitude modulating a signal defined by a phase information signal (1) and an envelope signal (2) comprises a power supply (30) arranged to provide an operating voltage under control of the envelope signal (2). The power supply (30) comprises a plurality of power supply stages (40) and a plurality of supply switches (50) coupled between the plurality of power supply stages (40) and the modulator (20). The power supply (30) is arranged to select one of the power supply stages (40) to provide the operating voltage under control of the envelope signal (2). The high efficiency modulator RF amplifier further comprises a modulator (20) for receiving the phase information signal (1), the envelope signal (2) and the operating voltage. The modulator (20) is arranged to provide an output signal of which an amplitude is modulated under control of the envelope signal (2).
摘要翻译： 用于对由相位信息信号（1）和包络信号（2）定义的信号进行幅度调制的高效率调制RF放大器（10）包括电源（30），其布置成在包络信号（ 2）。 电源（30）包括多个电源级（40）和耦合在多个电源级（40）和调制器（20）之间的多个电源开关（50）。 电源（30）被布置成选择一个电源级（40），以在包络信号（2）的控制下提供工作电压。 高效率调制器RF放大器还包括用于接收相位信息信号（1），包络信号（2）和工作电压的调制器（20）。 调制器（20）被布置成提供在包络信号（2）的控制下幅度被调制的输出信号。
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公开(公告)号：US20090304066A1
公开(公告)日：2009-12-10
申请号：US12134501
申请日：2008-06-06
申请人： Erik Chmelar , Choshu Ito , William Loh
发明人： Erik Chmelar , Choshu Ito , William Loh
CPC分类号： H04L25/03057 , H03M1/002 , H03M1/004 , H03M1/361 , H03M1/367
摘要： Various embodiments of the present invention provide systems and methods for signal equalization, and in some cases analog to digital conversion. For example, an analog to digital converter is disclosed that includes a comparator bank that receives a reference indicator and is operable to provide a decision output based at least in part on a comparison of an analog input with a reference threshold corresponding to the reference indicator. A range selection filter is included that has a first adjustment calculation circuit and a second adjustment calculation circuit. The first adjustment calculation circuit is operable to calculate a first adjustment feedback value based at least in part on a speculation that the decision output is a first logic level, and the second adjustment calculation circuit is operable to calculate a second adjustment feedback value based at least in part on a speculation that the decision output is a second logic level. A selector circuit selects the first adjustment feedback to generate the reference indicator when the decision output is the first logic level, and selects the second adjustment feedback to generate the reference indicator when the decision output is the second logic level.
摘要翻译： 本发明的各种实施例提供用于信号均衡的系统和方法，并且在某些情况下提供模数转换。 例如，公开了一种模数转换器，其包括：比较器组，其接收参考指示符，并且可操作以至少部分地基于模拟输入与对应于参考指示符的参考阈值的比较来提供判定输出。 包括具有第一调整计算电路和第二调整计算电路的量程选择滤波器。 所述第一调整计算电路至少部分地基于所述判定输出是第一逻辑电平的推测来计算第一调整反馈值，并且所述第二调整计算电路可操作以至少至少计算第二调整反馈值 部分原因是决策输出是第二个逻辑电平。 当决策输出是第一逻辑电平时，选择器电路选择第一调整反馈以产生参考指示符，并且当决策输出是第二逻辑电平时，选择第二调整反馈以产生参考指示符。
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