公开(公告)号：US07659763B2

公开(公告)日：2010-02-09

申请号：US12041913

申请日：2008-03-04

申请人： Hibourahima Camara ,  Sergey V. Rylov

发明人： Hibourahima Camara ,  Sergey V. Rylov

IPC分类号： H03K3/013

CPC分类号： G06F1/04

摘要： A conditioning buffer is provided for a clock interpolator that controls the duration of the clock edges to achieve high-linearity interpolation. The conditioning buffer includes a first buffer and a second buffer, with a fixed or variable strength, that receive their respective inputs from a set of mutually delayed clock signals, such as a set of N equidistant clock phases with mutual delay of 360/N degrees, to form a two-tap transversal filter that is insensitive to changes in Process, Temperature, and Voltage (PVT). Use of an equidistant set of clock phases makes the time constant of such transversal filter proportional to the clock period thus making it insensitive to changes in clock frequency as well. Such transversal filtering action operated in conjunction with natural bandwidth limitations of the buffers yields an efficient clock conditioning circuit that is highly insensitive to PVT and clock frequency variations.

摘要翻译： 为时钟内插器提供调节缓冲器，时钟内插器控制时钟边沿的持续时间以实现高线性内插。 调理缓冲器包括具有固定或可变强度的第一缓冲器和第二缓冲器，其从一组相互延迟的时钟信号接收它们各自的输入，例如相互延迟为360 / N度的一组N个等距时钟相位 ，以形成对过程，温度和电压（PVT）变化不敏感的双抽头横向过滤器。 使用等距离的时钟相位使得这种横向滤波器的时间常数与时钟周期成比例，从而使其对时钟频率的变化不敏感。 结合缓冲器的自然带宽限制操作的这种横向滤波操作产生对PVT和时钟频率变化高度不敏感的有效时钟调节电路。

公开(公告)号：US20090224811A1

公开(公告)日：2009-09-10

申请号：US12041913

申请日：2008-03-04

申请人： Hibourahima Camara ,  Sergey V. Rylov

发明人： Hibourahima Camara ,  Sergey V. Rylov

IPC分类号： H03H11/26

CPC分类号： G06F1/04

摘要： A conditioning buffer is provided for a clock interpolator that controls the duration of the clock edges to achieve high-linearity interpolation. The conditioning buffer includes a first buffer and a second buffer, with a fixed or variable strength, that receive their respective inputs from a set of mutually delayed clock signals, such as a set of N equidistant clock phases with mutual delay of 360/N degrees, to form a two-tap transversal filter that is insensitive to changes in Process, Temperature, and Voltage (PVT). Use of an equidistant set of clock phases makes the time constant of such transversal filter proportional to the clock period thus making it insensitive to changes in clock frequency as well. Such transversal filtering action operated in conjunction with natural bandwidth limitations of the buffers yields an efficient clock conditioning circuit that is highly insensitive to PVT and clock frequency variations.

摘要翻译： 为时钟内插器提供调节缓冲器，时钟内插器控制时钟边沿的持续时间以实现高线性内插。 调理缓冲器包括具有固定或可变强度的第一缓冲器和第二缓冲器，其从一组相互延迟的时钟信号接收它们各自的输入，例如相互延迟为360 / N度的一组N个等距时钟相位 ，以形成对过程，温度和电压（PVT）变化不敏感的双抽头横向过滤器。 使用等距离的时钟相位使得这种横向滤波器的时间常数与时钟周期成比例，从而使其对时钟频率的变化不敏感。 结合缓冲器的自然带宽限制操作的这种横向滤波操作产生对PVT和时钟频率变化高度不敏感的有效时钟调节电路。

公开(公告)号：US07332956B2

公开(公告)日：2008-02-19

申请号：US11163688

申请日：2005-10-27

申请人： Hibourahima Camara ,  Louis C. Hsu ,  James D. Rockrohr ,  Karl D. Selander ,  Huihao Xu ,  Steven J. Zier

发明人： Hibourahima Camara ,  Louis C. Hsu ,  James D. Rockrohr ,  Karl D. Selander ,  Huihao Xu ,  Steven J. Zier

IPC分类号： G05F1/10

CPC分类号： H03K17/223 ,  G05F3/262 ,  G11C5/144 ,  G11C5/145 ,  G11C7/20 ,  H03K17/08

摘要： A system for protecting a weak device operating in micro-electronic circuit that includes a high voltage power supply from high voltage over stressing prevents the weak device from failing during power-up, power-down, and when a low voltage power supply in a multiple power supply system is absent. The system includes a low voltage power supply detection circuit configured to detect circuit power-up, circuit power-down, and when the low voltage power supply is absent, and generate a control signal upon detection. The system further includes a controlled current mirror device configured to provide a trickle current to maintain a conduction channel in the weak device in response to the control signal received from the low voltage power supply detection circuit during circuit power-up, circuit power-down, and when the low voltage power supply is absent.

摘要翻译： 用于保护在微电子电路中操作的弱电装置的系统包括来自高电压过应力的高压电源，防止弱电装置在上电，断电期间发生故障，并且当多个电源中的低电压电源 供电系统不存在。 该系统包括低电压电源检测电路，其被配置为检测电路上电，电路掉电以及当低电压电源不存在时，并且在检测时产生控制信号。 该系统还包括被配置为提供涓流电流的受控电流镜装置，以响应于在电路加电，电路断电期间从低电压电源检测电路接收的控制信号来保持弱装置中的导通通道， 并且当低电压电源不存在时。

公开(公告)号：US06891357B2

公开(公告)日：2005-05-10

申请号：US10249545

申请日：2003-04-17

申请人： Hibourahima Camara ,  Louis Lu-Chen Hsu ,  Karl D. Selander ,  Michael A. Sorna

发明人： Hibourahima Camara ,  Louis Lu-Chen Hsu ,  Karl D. Selander ,  Michael A. Sorna

IPC分类号： G05F1/565 ,  G05F3/16 ,  G05F1/10

CPC分类号： G05F1/565

摘要： As disclosed herein, systems and methods are provided for generating and distributing a plurality of reference currents on an integrated circuit. In a particular embodiment, an integrated circuit is disclosed which includes a reference current generator adapted to generate a plurality of reference currents. Such circuit includes an operational amplifier coupled to receive, at a first polarity input, a reference voltage, and a first transistor Q1 having a biasing input coupled to an output of the operational amplifier. The first transistor also has an output coupled to a fixed potential through a first resistor R1, and the output of the first transistor Q1 is further coupled as feedback to a second polarity input of the operational amplifier. One or more second transistors Qi are provided in the circuit, each of which has a biasing input coupled to the output of the operational amplifier, and an output coupled to the fixed potential through a respective second resistor Ri. In order to conserve chip area and power, the outputs of the second transistors Qi are not coupled as feedback to the operational amplifier. By the action of the operational amplifier, bias is maintained on the first transistor Q1 and each of the second transistors Qi for each to conduct a reference current Isi.

摘要翻译： 如本文所公开的，提供了用于在集成电路上产生和分配多个参考电流的系统和方法。 在特定实施例中，公开了一种集成电路，其包括适于产生多个参考电流的参考电流发生器。 这种电路包括运算放大器，耦合以在第一极性输入处接收参考电压，以及具有耦合到运算放大器的输出的偏置输入的第一晶体管Q1。 第一晶体管还具有通过第一电阻器R 1耦合到固定电位的输出，并且第一晶体管Q1的输出进一步耦合到反馈到运算放大器的第二极性输入端。 一个或多个第二晶体管Qi被提供在电路中，每个具有耦合到运算放大器的输出的偏置输入，以及通过相应的第二电阻器R1耦合到固定电位的输出。 为了节省芯片面积和功率，第二晶体管Qi的输出不作为反馈耦合到运算放大器。 通过运算放大器的作用，第一晶体管Q 1和第二晶体管Q i中的每一个都保持偏置来导通参考电流Isi。

公开(公告)号：US07694243B2

公开(公告)日：2010-04-06

申请号：US11964894

申请日：2007-12-27

申请人： Hibourahima Camara ,  Louis C. Hsu ,  James D. Rockrohr ,  Karl D. Selander ,  Huihao Xu ,  Steven J. Zier

发明人： Hibourahima Camara ,  Louis C. Hsu ,  James D. Rockrohr ,  Karl D. Selander ,  Huihao Xu ,  Steven J. Zier

IPC分类号： G06F17/50

CPC分类号： H03K19/00315

摘要： A system for protecting a weak device operating in micro-electronic circuit and a design structure including the system embodied in a machine readable medium are disclosed. The system includes a high voltage power supply from high voltage overstressing prevents the weak device from failing during power-up, power-down, and when a low voltage power supply in a multiple power supply system is absent. The system further includes a low voltage power supply detection circuit configured to detect circuit power-up, circuit power-down, and when the low voltage power supply is absent, and generate a control signal upon detection. The system further includes a controlled current mirror device configured to provide a trickle current to maintain a conduction channel in the weak device in response to the control signal received from the low voltage power supply detection circuit during circuit power-up, circuit power-down, and when the low voltage power supply is absent.

摘要翻译： 公开了一种用于保护在微电子电路中操作的弱设备的系统和包括体现在机器可读介质中的系统的设计结构。 该系统包括来自高压过应力的高压电源，防止弱电装置在上电，掉电期间以及当多电源系统中的低电压电源不存在时发生故障。 该系统还包括：低电压电源检测电路，被配置为检测电路上电，电路断电以及当低电压电源不存在时，并在检测时产生控制信号。 该系统还包括被配置为提供涓流电流的受控电流镜装置，以响应于在电路加电，电路断电期间从低电压电源检测电路接收的控制信号来保持弱装置中的导通通道， 并且当低电压电源不存在时。

公开(公告)号：US20090172614A1

公开(公告)日：2009-07-02

申请号：US11964894

申请日：2007-12-27

申请人： Hibourahima Camara ,  Louis C. Hsu ,  James D. Rockrohr ,  Karl D. Selander ,  Huihao Xu ,  Steven J. Zier

发明人： Hibourahima Camara ,  Louis C. Hsu ,  James D. Rockrohr ,  Karl D. Selander ,  Huihao Xu ,  Steven J. Zier

IPC分类号： G06F17/50

CPC分类号： H03K19/00315

摘要： A system for protecting a weak device operating in micro-electronic circuit and a design structure including the system embodied in a machine readable medium are disclosed. The system includes a high voltage power supply from high voltage overstressing prevents the weak device from failing during power-up, power-down, and when a low voltage power supply in a multiple power supply system is absent. The system further includes a low voltage power supply detection circuit configured to detect circuit power-up, circuit power-down, and when the low voltage power supply is absent, and generate a control signal upon detection. The system further includes a controlled current mirror device configured to provide a trickle current to maintain a conduction channel in the weak device in response to the control signal received from the low voltage power supply detection circuit during circuit power-up, circuit power-down, and when the low voltage power supply is absent.

摘要翻译： 公开了一种用于保护在微电子电路中操作的弱设备的系统和包括体现在机器可读介质中的系统的设计结构。 该系统包括来自高压过应力的高压电源，防止弱电装置在上电，掉电期间以及当多电源系统中的低电压电源不存在时发生故障。 该系统还包括：低电压电源检测电路，被配置为检测电路上电，电路断电以及当低电压电源不存在时，并在检测时产生控制信号。 该系统还包括被配置为提供涓流电流的受控电流镜装置，以响应于在电路加电，电路断电期间从低电压电源检测电路接收的控制信号来保持弱装置中的导通通道， 并且当低电压电源不存在时。

公开(公告)号：US07352815B2

公开(公告)日：2008-04-01

申请号：US10604025

申请日：2003-06-23

申请人： Hibourahima Camara ,  Joseph Natonio ,  Karl D. Selander ,  Michael A. Sorna ,  Jeremy K. Stephens ,  Daniel W. Storaska

发明人： Hibourahima Camara ,  Joseph Natonio ,  Karl D. Selander ,  Michael A. Sorna ,  Jeremy K. Stephens ,  Daniel W. Storaska

IPC分类号： H04B3/00

CPC分类号： H04L25/03885

摘要： Apparatus and method for counteracting high frequency attenuation of a differential input data signal as the signal is conducted through a data link. A differential input data signal is transmitted from a transmitter to a receiver through a data link. The data eye of the differential input data signal is modified at the transmitter in response to feedback from the receiver where the extent of the data eye of the differential input data signal, after being conducted through the data link, is determined. The feedback to the transmitter, dependent on the determination of the extent of the data eye, controls the data eye at the transmitter and the equalization of the differential input data signal by adapting the differential input data signal to anticipate high frequency attenuation of the differential input data signal in the data link.

摘要翻译： 当通过数据链路传送信号时，抵消差分输入数据信号的高频衰减的装置和方法。 差分输入数据信号通过数据链路从发送器发送到接收器。 差分输入数据信号的数据眼睛响应于来自接收机的反馈在发射机处被修改，其中差分输入数据信号在通过数据链路传导之后的数据眼的程度被确定。 取决于数据眼的范围的确定，对发射机的反馈通过调整差分输入数据信号来预测差分输入的高频衰减来控制发射机上的数据眼和差分输入数据信号的均衡 数据链路中的数据信号。

公开(公告)号：US20070096797A1

公开(公告)日：2007-05-03

申请号：US11163688

申请日：2005-10-27

申请人： Hibourahima Camara ,  Louis Hsu ,  James Rockrohr ,  Karl Selander ,  Huihao Xu ,  Steven Zier

发明人： Hibourahima Camara ,  Louis Hsu ,  James Rockrohr ,  Karl Selander ,  Huihao Xu ,  Steven Zier

IPC分类号： G05F1/10

CPC分类号： H03K17/223 ,  G05F3/262 ,  G11C5/144 ,  G11C5/145 ,  G11C7/20 ,  H03K17/08

摘要： A system for protecting a weak device operating in micro-electronic circuit that includes a high voltage power supply from high voltage overstressing prevents the weak device from failing during power-up, power-down, and when a low voltage power supply in a multiple power supply system is absent. The system includes a low voltage power supply detection circuit configured to detect circuit power-up, circuit power-down, and when the low voltage power supply is absent, and generate a control signal upon detection. The system further includes a controlled current mirror device configured to provide a trickle current to maintain a conduction channel in the weak device in response to the control signal received from the low voltage power supply detection circuit during circuit power-up, circuit power-down, and when the low voltage power supply is absent.

摘要翻译： 用于保护微电子电路中操作的弱电装置的系统包括来自高压过应力的高电压电源，防止在上电，掉电期间以及当多功率电源中的低电压电源时弱装置发生故障 供应系统不存在。 该系统包括低电压电源检测电路，其被配置为检测电路上电，电路掉电以及当低电压电源不存在时，并且在检测时产生控制信号。 该系统还包括被配置为提供涓流电流的受控电流镜装置，以响应于在电路加电，电路断电期间从低电压电源检测电路接收的控制信号来保持弱装置中的导通通道， 并且当低电压电源不存在时。

公开(公告)号：US07132821B2

公开(公告)日：2006-11-07

申请号：US11103314

申请日：2005-04-11

申请人： Hibourahima Camara ,  Louis Lu-Chen Hsu ,  Karl D. Selander ,  Michael A. Sorna

发明人： Hibourahima Camara ,  Louis Lu-Chen Hsu ,  Karl D. Selander ,  Michael A. Sorna

IPC分类号： G05F3/16 ,  G05F1/10 ,  H03F3/45

CPC分类号： G05F1/565

摘要： Systems are provided for generating and distributing a plurality of reference currents on an integrated circuit. More particularly, an integrated circuit is provided which includes a reference current generating system. The reference current generating system includes a first reference current generator disposed at a first location of the integrated circuit which is operable to generate a plurality of first reference currents. A plurality of second reference current generators are disposed at a plurality of second locations of the integrated circuit. Each of the second reference current generators are operable to generate a second reference current from one of the plurality of first reference currents. In a particular example, the first location at which the first reference current generator is disposed is a central location and the second locations are disposed remote from the first location.

摘要翻译： 提供了用于在集成电路上生成和分配多个参考电流的系统。 更具体地，提供了包括参考电流产生系统的集成电路。 参考电流产生系统包括设置在集成电路的第一位置处的第一参考电流发生器，其可操作以产生多个第一参考电流。 多个第二参考电流发生器设置在集成电路的多个第二位置处。 每个第二参考电流发生器可操作以从多个第一参考电流之一产生第二参考电流。 在特定示例中，设置第一参考电流发生器的第一位置是中心位置，并且第二位置远离第一位置设置。

公开(公告)号：US20050179486A1

公开(公告)日：2005-08-18

申请号：US11103314

申请日：2005-04-11

申请人： Hibourahima Camara ,  Louis Hsu ,  Karl Selander ,  Michael Sorna

发明人： Hibourahima Camara ,  Louis Hsu ,  Karl Selander ,  Michael Sorna

IPC分类号： G05F1/565 ,  H03K4/06

CPC分类号： G05F1/565

摘要： Systems are provided for generating and distributing a plurality of reference currents on an integrated circuit. More particularly, an integrated circuit is provided which includes a reference current generating system. The reference current generating system includes a first reference current generator disposed at a first location of the integrated circuit which is operable to generate a plurality of first reference currents. A plurality of second reference current generators are disposed at a plurality of second locations of the integrated circuit. Each of the second reference current generators are operable to generate a second reference current from one of the plurality of first reference currents. In a particular example, the first location at which the first reference current generator is disposed is a central location and the second locations are disposed remote from the first location.

摘要翻译： 提供了用于在集成电路上生成和分配多个参考电流的系统。 更具体地，提供了包括参考电流产生系统的集成电路。 参考电流产生系统包括设置在集成电路的第一位置处的第一参考电流发生器，其可操作以产生多个第一参考电流。 多个第二参考电流发生器设置在集成电路的多个第二位置处。 每个第二参考电流发生器可操作以从多个第一参考电流之一产生第二参考电流。 在特定示例中，设置第一参考电流发生器的第一位置是中心位置，并且第二位置远离第一位置设置。