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公开(公告)号：US20080260086A1
公开(公告)日：2008-10-23
申请号：US12104817
申请日：2008-04-17
IPC分类号： H04L7/00
CPC分类号： H04L27/0014 , H04L2027/0034 , H04L2027/0053 , H04L2027/0065 , H04L2027/0073
摘要： Disclosed herein is a carrier synchronizing circuit including at least frequency synchronizing means and phase synchronizing means. The phase synchronizing means includes residual frequency error detecting means for detecting a residual frequency error after a frequency synchronizing process by the frequency synchronizing means and supplying the residual frequency error to the frequency synchronizing means, and the frequency synchronizing means performs frequency pull-in for the residual frequency error supplied from the residual frequency error detecting means after first timing.
摘要翻译： 这里公开了一种载波同步电路，至少包括频率同步装置和相位同步装置。 相位同步装置包括残余频率误差检测装置，用于检测由频率同步装置进行频率同步处理后的残余频率误差，并向频率同步装置提供残余频率误差，并且频率同步装置对 在第一定时之后从残余频率误差检测装置提供的残余频率误差。
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公开(公告)号：US08170170B2
公开(公告)日：2012-05-01
申请号：US12104817
申请日：2008-04-17
IPC分类号： H03D3/24
CPC分类号： H04L27/0014 , H04L2027/0034 , H04L2027/0053 , H04L2027/0065 , H04L2027/0073
摘要： Disclosed herein is a carrier synchronizing circuit including at least frequency synchronizing means and phase synchronizing means. The phase synchronizing means includes residual frequency error detecting means for detecting a residual frequency error after a frequency synchronizing process by the frequency synchronizing means and supplying the residual frequency error to the frequency synchronizing means, and the frequency synchronizing means performs frequency pull-in for the residual frequency error supplied from the residual frequency error detecting means after first timing.
摘要翻译： 这里公开了一种载波同步电路，至少包括频率同步装置和相位同步装置。 相位同步装置包括残余频率误差检测装置，用于检测由频率同步装置进行频率同步处理后的残余频率误差，并向频率同步装置提供残余频率误差，并且频率同步装置对 在第一定时之后从残余频率误差检测装置提供的残余频率误差。
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公开(公告)号：US20100303186A1
公开(公告)日：2010-12-02
申请号：US12662669
申请日：2010-04-28
摘要： Disclosed herein is a synchronization circuit including: a first phase-locked loop circuit; a second phase-locked loop circuit; a first output circuit; a second output circuit; a first detection circuit; a second detection circuit; and a control circuit.
摘要翻译： 这里公开了一种同步电路，包括：第一锁相环电路; 第二锁相环电路; 第一输出电路; 第二输出电路; 第一检测电路; 第二检测电路; 和控制电路。
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公开(公告)号：US08406366B2
公开(公告)日：2013-03-26
申请号：US12662669
申请日：2010-04-28
IPC分类号： H04L7/00
摘要： Disclosed herein is a synchronization circuit including: a first phase-locked loop circuit; a second phase-locked loop circuit; a first output circuit; a second output circuit; a first detection circuit; a second detection circuit; and a control circuit.
摘要翻译： 这里公开了一种同步电路，包括：第一锁相环电路; 第二锁相环电路; 第一输出电路; 第二输出电路; 第一检测电路; 第二检测电路; 和控制电路。
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公开(公告)号：US08385371B2
公开(公告)日：2013-02-26
申请号：US12597527
申请日：2008-04-25
申请人： Hideyuki Matsumoto , Tetsuhiro Futami , Atsushi Makita , Takashi Yokokawa , Doan Tien Dung , Yuichi Mizutani
发明人： Hideyuki Matsumoto , Tetsuhiro Futami , Atsushi Makita , Takashi Yokokawa , Doan Tien Dung , Yuichi Mizutani
IPC分类号： H04J3/06
CPC分类号： H04L7/08 , H04H20/74 , H04H40/90 , H04L27/2656 , H04L27/2675
摘要： A frame synchronizer, frame synchronization method and demodulator which can more positively establish frame synchronization of an input signal which is likely to have a plurality of frame lengths. A differential correlation detector calculates a differential correlation value with no pilot which is associated with the absence of a pilot signal inserted in the input signal and a differential correlation value with a pilot which is associated with the presence of a pilot signal inserted in the input signal. Frame period confirmation counters perform, based on the differential correlation values with no pilot, frame synchronization control appropriate to the input signals whose frame lengths are 21690 and 32490 symbols, respectively. The frame period confirmation counters 1 perform, based on the differential correlation values with a pilot, frame synchronization control appropriate to the input signals whose frame lengths are 22194 and 33282 symbols, respectively.
摘要翻译： 一种帧同步器，帧同步方法和解调器，其可以更可靠地建立可能具有多个帧长度的输入信号的帧同步。 差分相关检测器计算与无输入信号中插入的导频信号不相关的导频的差分相关值，以及与插入在输入信号中的导频信号的存在相关联的导频的差分相关值 。 帧周期确认计数器基于不具有导频的差分相关值，分别对帧长度为21690和32490个符号的输入信号进行适合的帧同步控制。 帧周期确认计数器1基于与分别具有帧长度为22194和33282个符号的输入信号相适应的具有导频的差分相关值来执行帧同步控制。
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公开(公告)号：US20100135335A1
公开(公告)日：2010-06-03
申请号：US12597527
申请日：2008-04-25
申请人： Hideyuki Matsumoto , Tetsuhiro Futami , Atsushi Makita , Takashi Yokokawa , Doan Tien Dung , Yuichi Mizutani
发明人： Hideyuki Matsumoto , Tetsuhiro Futami , Atsushi Makita , Takashi Yokokawa , Doan Tien Dung , Yuichi Mizutani
IPC分类号： H04J3/06
CPC分类号： H04L7/08 , H04H20/74 , H04H40/90 , H04L27/2656 , H04L27/2675
摘要： The present invention relates to a frame synchronizer, frame synchronization method and demodulator which can more positively establish frame synchronization of an input signal which is likely to have a plurality of frame lengths.A differential correlation detector 151 calculates a differential correlation value with no pilot which is associated with the absence of a pilot signal inserted in the input signal and a differential correlation value with a pilot which is associated with the presence of a pilot signal inserted in the input signal. The frame period confirmation counters 152-1 and 152-3 perform, based on the differential correlation values with no pilot, frame synchronization control appropriate to the input signals whose frame lengths are 21690 and 32490 symbols, respectively. The frame period confirmation counters 152-2 and 152-4 perform, based on the differential correlation values with a pilot, frame synchronization control appropriate to the input signals whose frame lengths are 22194 and 33282 symbols, respectively.The present invention is applicable, for example, to a satellite broadcast receiver.
摘要翻译： 帧同步器，帧同步方法和解调器技术领域本发明涉及帧同步器，帧同步方法和解调器，其可以更可靠地建立可能具有多个帧长度的输入信号的帧同步。 差分相关检测器151计算与没有插入在输入信号中的导频信号不相关的导频的差分相关值以及与插入在输入端中的导频信号的存在相关联的导频的差分相关值 信号。 帧周期确认计数器152-1,152-3分别基于不具有导频的差分相关值，分别对帧长度分别为21690和32490的输入信号进行适合的帧同步控制。 帧周期确认计数器152-2,152-4分别基于具有导频的差分相关值，分别对帧长度为22194和33282符号的输入信号进行适合的帧同步控制。 本发明可以应用于例如卫星广播接收机。
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7.发明授权Signal receiving apparatus, signal receiving method and signal receiving program 失效信号接收装置，信号接收方法和信号接收程序公开(公告)号：US08750424B2
公开(公告)日：2014-06-10
申请号：US13205781
申请日：2011-08-09
申请人： Tetsuhiro Futami , Keita Izumi
发明人： Tetsuhiro Futami , Keita Izumi
IPC分类号： H03D3/00
CPC分类号： H04L27/227 , H04L25/03006 , H04L25/067 , H04L27/0014 , H04L27/06 , H04L27/3818 , H04L27/3872 , H04L2025/03687 , H04L2027/0057 , H04L2027/0079
摘要： A signal receiving apparatus has: a radius identifying section configured to identify a radius representing a distance from an origin on an IQ plane of signal points each corresponding to a symbol obtained from a received signal modulated by adoption of an APSK modulation method; and a parameter outputting section configured to output a control parameter related to a demodulation or decoding process of the received signal on the basis of the identified radius.
摘要翻译： 信号接收装置具有：半径识别部，其被配置为识别与从通过采用APSK调制方法调制的接收信号获得的符号相对应的信号点的IQ平面上的来自原点的距离的半径; 以及参数输出部，被配置为基于所识别的半径来输出与所述接收信号的解调或解码处理有关的控制参数。
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公开(公告)号：US07548595B2
公开(公告)日：2009-06-16
申请号：US10988411
申请日：2004-11-12
IPC分类号： H03K9/00
CPC分类号： H04L25/0202 , H04B2201/70701 , H04L25/0222
摘要： The invention relates to an apparatus and a method for estimating a fading frequency of incoming received waves in a receiving station of a radio communication system or radio transmission system. An object of the invention is to estimate a fading frequency efficiently and accurately without substantially complexing the configuration of the system. To this end, the invention provides an apparatus for estimating a fading frequency from a pilot signal in a reception signal, which includes a calculation unit for calculating a magnitude of a complex product of two symbols that are received at different instants, and an estimation unit for estimating a fading frequency according to the calculated magnitude of the complex product.
摘要翻译： 本发明涉及一种用于估计无线电通信系统或无线电传输系统的接收站中的输入接收波的衰落频率的装置和方法。 本发明的目的是有效且准确地估计衰落频率，而不会使系统的配置基本上复杂化。 为此，本发明提供了一种用于从接收信号中的导频信号估计衰落频率的装置，其包括：用于计算在不同时刻接收的两个符号的复乘的幅度的计算单元和估计单元 用于根据所计算的复数乘积的大小来估计衰落频率。
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9.发明授权公开(公告)号：US06920173B2
公开(公告)日：2005-07-19
申请号：US10033196
申请日：2001-12-28
申请人： Tadashi Nakamura , Tetsuhiro Futami
发明人： Tadashi Nakamura , Tetsuhiro Futami
CPC分类号： H04B1/71075
摘要： In a spread-spectrum signal receiver apparatus for receiving a spread-spectrum signal and demodulating transmit data from the signal, a receiver receives a spread-spectrum signal that has been spread by a spreading code comprising a combination of a first code that varies depending upon spreading factor and a second code that differs for every user, an interference canceller produces a replica of an interference signal from the receive signal using a despreading code comprising a combination of the first code, which is regarded as a code decided based upon a minimum spreading factor, and the second code that differs for every user, and a receive modulator demodulates transmit data from a signal obtained by subtracting the replica from the receive signal.
摘要翻译： 在扩展频谱信号接收装置中，接收扩频信号并解调来自信号的发射数据，接收机接收扩展码扩展的扩频信号，该扩频码包括根据第 扩展因子和对于每个用户不同的第二代码，干扰消除器使用解扩码产生来自接收信号的干扰信号的副本，解扩码包括第一代码的组合，第一代码被认为是基于最小扩展 因子和对于每个用户不同的第二代码，并且接收调制器从通过从接收信号中减去副本而获得的信号来解调发送数据。
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10.发明申请Error correction decoding, communication apparatus, and digital transmission system 审中-公开纠错解码，通信装置和数字传输系统公开(公告)号：US20060140313A1
公开(公告)日：2006-06-29
申请号：US11211657
申请日：2005-08-26
申请人： Tetsuhiro Futami , Dai Kimura
发明人： Tetsuhiro Futami , Dai Kimura
IPC分类号： H04L27/06
CPC分类号： H04L1/0054 , H04L1/001 , H04L1/0028 , H04L1/0033 , H04L1/0035 , H04L1/0039 , H04L1/0072 , H04W52/04
摘要： An error correction decoding method using a correlating decoding technique is provided. The method includes the steps of estimating a decoding reliability of a decoding result using one or more correlation values acquired in a correlating process; and correcting the decoding result according to the decoding reliability.
摘要翻译： 提供了使用相关解码技术的纠错解码方法。 该方法包括以下步骤：使用在相关处理中获取的一个或多个相关值来估计解码结果的解码可靠性; 以及根据解码可靠性来校正解码结果。
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