摘要:
A memory circuit according to an embodiment includes: a first transistor including a first source/drain electrode, a second source/drain electrode, and a first gate electrode; a second transistor including a third source/drain electrode connected to the second source/drain electrode, a fourth source/drain electrode, and a second gate electrode; a third transistor and a fourth transistor forming an inverter circuit, the third transistor including a fifth source/drain electrode, a sixth source/drain electrode, and a third gate electrode connected to the second source/drain electrode, the fourth transistor including a seventh source/drain electrode connected to the sixth source/drain electrode, an eighth source/drain electrode, and a fourth gate electrode connected to the second source/drain electrode; and an output terminal connected to the sixth source/drain electrode. At least one of the third transistor and the fourth transistor is a spin MOSFET, and an output of the inverter circuit is sent from the output terminal.
摘要:
Certain embodiments provide a nonvolatile memory circuit in which a first p-channel MOS transistor and a first n-channel spin MOS transistor are connected in series, a second p-channel MOS transistor and a second n-channel spin MOS transistor are connected in series, gates of the first p-channel MOS transistor and the first n-channel spin MOS transistor are connected, gates of the second p-channel MOS transistor and the second n-channel spin MOS transistor are connected, a first n-channel transistor includes a drain connected to a drain of the first p-channel transistor and the gate of the second p-channel transistor, a second n-channel transistor includes a drain connected to a drain of the second p-channel transistor and the gate of the first p-channel transistor, and gates of the first and second n-channel transistors are connected.
摘要:
A spin transistor according to an embodiment includes: a first magnetic layer formed above a substrate and serving as one of a source and a drain; an insulating film having a lower face facing to an upper face of the first magnetic layer, an upper face opposed to the lower face, and a side face different from the lower and upper faces, the insulating film being formed on the upper face of the first magnetic layer and serving as a channel; a second magnetic layer formed on the upper face of the insulating film and serving as the other one of the source and the drain; a gate electrode formed along the side face of the insulating film; and a gate insulating film located between the gate electrode and the side face of the insulating film.
摘要:
A look-up table circuit according to an embodiment includes: a variable resistance circuit including variable resistance devices and selecting a variable resistance device from the variable resistance devices based on an input signal; a reference circuit having a resistance value between the largest resistance value and the smallest resistance value of the variable resistance circuit; a first n-channel MOSFET including a source connected to a terminal of the variable resistance circuit and a gate connected to a drain; a second n-channel MOSFET including a source connected to a terminal of the reference circuit and a gate connected to the gate of the first n-channel MOSFET; a first current supply circuit to supply a current to the variable resistance circuit; a second current supply circuit to supply a current to the reference circuit; and a comparator comparing voltages at a first input terminal and a second input terminal.
摘要:
Certain embodiments provide a nonvolatile memory circuit in which a first p-channel MOS transistor and a first n-channel spin MOS transistor are connected in series, a second p-channel MOS transistor and a second n-channel spin MOS transistor are connected in series, gates of the first p-channel MOS transistor and the first n-channel spin MOS transistor are connected, gates of the second p-channel MOS transistor and the second n-channel spin MOS transistor are connected, a first n-channel transistor includes a drain connected to a drain of the first p-channel transistor and the gate of the second p-channel transistor, a second n-channel transistor includes a drain connected to a drain of the second p-channel transistor and the gate of the first p-channel transistor, and gates of the first and second n-channel transistors are connected.
摘要:
A pass transistor circuit according to an embodiment includes: a first input/output terminal connected to a first signal line; a second input/output terminal connected to a second signal line; a first device having a first terminal connected to a first power supply and a second terminal; a second device having a third terminal connected to the second terminal and a fourth terminal connected to a second power supply; a first transistor having one of source/drain connected to the second terminal, a gate receiving a first control signal; and a second transistor having a gate connected to the other one of source/drain of the first transistor, one of source/drain connected to the first input/output terminal, and the other one of source/drain connected to the second input/output terminal. One of the first and second devices is a nonvolatile memory device, the other one of the first and second devices is a MOSFET.
摘要:
A pass transistor circuit according to an embodiment includes: a first input/output terminal connected to a first signal line; a second input/output terminal connected to a second signal line; a first device having a first terminal connected to a first power supply and a second terminal; a second device having a third terminal connected to the second terminal and a fourth terminal connected to a second power supply; a first transistor having one of source/drain connected to the second terminal, a gate receiving a first control signal; and a second transistor having a gate connected to the other one of source/drain of the first transistor, one of source/drain connected to the first input/output terminal, and the other one of source/drain connected to the second input/output terminal. One of the first and second devices is a nonvolatile memory device, the other one of the first and second devices is a MOSFET.
摘要:
A spin transistor according to an embodiment includes: a first magnetic layer formed above a substrate and serving as one of a source and a drain; an insulating film having a lower face facing to an upper face of the first magnetic layer, an upper face opposed to the lower face, and a side face different from the lower and upper faces, the insulating film being formed on the upper face of the first magnetic layer and serving as a channel; a second magnetic layer formed on the upper face of the insulating film and serving as the other one of the source and the drain; a gate electrode formed along the side face of the insulating film; and a gate insulating film located between the gate electrode and the side face of the insulating film.
摘要:
Certain embodiments provide a nonvolatile memory circuit in which a first p-channel MOS transistor and a first n-channel spin MOS transistor are connected in series, a second p-channel MOS transistor and a second n-channel spin MOS transistor are connected in series, gates of the first p-channel MOS transistor and the first n-channel spin MOS transistor are connected, gates of the second p-channel MOS transistor and the second n-channel spin MOS transistor are connected, a first n-channel transistor includes a drain connected to a drain of the first p-channel transistor and the gate of the second p-channel transistor, a second n-channel transistor includes a drain connected to a drain of the second p-channel transistor and the gate of the first p-channel transistor, and gates of the first and second n-channel transistors are connected.
摘要:
It is made possible to provide a reconfigurable logic circuit with which high integration can be achieved. A reconfigurable logic circuit includes: a multiplexer which includes a plurality of spin MOSFETs each having a source and drain containing a magnetic material, and a selecting portion including a plurality of MOSFETs and selecting a spin MOSFET from the plurality of spin MOSFETs, based on control data transmitted from control lines; a determining circuit which determines whether magnetization of the magnetic material of the source and drain of a selected spin MOSFET, which is selected by the selecting portion, is in a first state or in a second state; and a first and second write circuits which put the magnetization of the magnetic material of the source and drain of the selected spin MOSFET into the second and first states respectively by supplying a write current flowing between the source and drain of the selected spin MOSFET.